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From: Georg Gottleuber <ggo@tuxedocomputers.com>
To: Ulf Hansson <ulf.hansson@linaro.org>,
	Ben Chuang <benchuanggli@gmail.com>
Cc: adrian.hunter@intel.com, victor.shih@genesyslogic.com.tw,
	greg.tu@genesyslogic.com.tw, ben.chuang@genesyslogic.com.tw,
	HL.Liu@genesyslogic.com.tw, Lucas.Lai@genesyslogic.com.tw,
	victorshihgli@gmail.com, linux-mmc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Georg Gottleuber <ggo@tuxedocomputers.com>,
	Werner Sembach <wse@tuxedocomputers.com>,
	cs@tuxedo.de
Subject: Re: [PATCH 1/2] mmc: sdhci-pci-gli: GL9767: Fix low power mode on the set clock function
Date: Fri, 25 Oct 2024 17:40:26 +0200	[thread overview]
Message-ID: <4dd25dca-f217-4abd-88e8-0a6b03760dd7@tuxedocomputers.com> (raw)
In-Reply-To: <CAPDyKFpb5ZePhXziLH3VbuKKywJZbo8UBF1NM1_dyOWq9oLDng@mail.gmail.com>

Hello Ben, hello Uffe,

thank you for this fix.

Am 25.10.24 um 15:22 schrieb Ulf Hansson:
> + Georg
> 
> On Fri, 25 Oct 2024 at 08:01, Ben Chuang <benchuanggli@gmail.com> wrote:
>>
>> From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
>>
>> On sdhci_gl9767_set_clock(), the vendor header space(VHS) is read-only
>> after calling gl9767_disable_ssc_pll() and gl9767_set_ssc_pll_205mhz().
>> So the low power negotiation mode cannot be enabled again.
>> Introduce gl9767_set_low_power_negotiation() function to fix it.
>>
>> The explanation process is as below.
>>
>> static void sdhci_gl9767_set_clock()
>> {
>>         ...
>>         gl9767_vhs_write();
>>         ...
>>         value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF;
>>         pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <--- (a)
>>
>>         gl9767_disable_ssc_pll(); <--- (b)
>>         sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
>>
>>         if (clock == 0)
>>                 return;  <-- (I)
>>
>>         ...
>>         if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
>>                 ...
>>                 gl9767_set_ssc_pll_205mhz(); <--- (c)
>>         }
>>         ...
>>         value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;
>>         pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <-- (II)
>>         gl9767_vhs_read();
>> }
>>
>> (a) disable low power negotiation mode. When return on (I), the low power
>> mode is disabled.  After (b) and (c), VHS is read-only, the low power mode
>> cannot be enabled on (II).
>>
>> Fixes: d2754355512e ("mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767")
> 
> Is this the same problem as being reported in
> https://lore.kernel.org/all/41c1c88a-b2c9-4c05-863a-467785027f49@tuxedocomputers.com/
> 
> ?

Yes, this patch fixes
https://bugzilla.kernel.org/show_bug.cgi?id=219284

This makes my patch obsolete.

Kind regards,
Georg

  reply	other threads:[~2024-10-25 15:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-25  6:00 Ben Chuang
2024-10-25  6:00 ` [PATCH 2/2] mmc: sdhci-pci-gli: GL9767: Fix low power mode in the SD Express process Ben Chuang
2024-10-28 11:43   ` Ulf Hansson
2024-10-25 13:22 ` [PATCH 1/2] mmc: sdhci-pci-gli: GL9767: Fix low power mode on the set clock function Ulf Hansson
2024-10-25 15:40   ` Georg Gottleuber [this message]
2024-10-28  0:21     ` Ben Chuang
2024-10-28 11:43     ` Ulf Hansson
2024-10-29  2:14       ` Ben Chuang
2024-10-28  0:08   ` Ben Chuang

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