* Re: [PATCH 1/1] riscv: dts: spacemit: enable onboard eeprom for OrangePi
2026-09-01 8:00 [PATCH 1/1] riscv: dts: spacemit: enable onboard eeprom for OrangePi Chukun Pan
@ 2026-09-05 17:05 ` Gong Shuai
0 siblings, 0 replies; 2+ messages in thread
From: Gong Shuai @ 2026-09-05 17:05 UTC (permalink / raw)
To: Chukun Pan, Yixun Lan
Cc: Rob Herring, Paul Walmsley, Alexandre Ghiti, Albert Ou,
Conor Dooley, Krzysztof Kozlowski, linux-riscv, linux-kernel,
devicetree, spacemit
On 9/1/2026 4:00 PM, Chukun Pan wrote:
> Enable the i2c2 bus and add the connected GT24C02B EEPROM.
>
> [ 6.766] TlvInfo Header:
> [ 6.766] Id String: TlvInfo
> [ 6.769] Version: 1
> [ 6.772] Total Length: 38
> [ 6.775] TLV Name Code Len Value
> [ 6.779] -------------------- ---- --- -----
> [ 6.783] Base MAC Address 0x24 6 .....
> [ 6.788] MAC Addresses 0x2A 2 2
> [ 6.792] Product Name 0x21 15 x1_orangepi-r2s
> [ 6.797] Unknown 0x41 1 0x01
> [ 6.801] CRC-32 0xFE 4 0xE5A74B18
> [ 6.806] Checksum is valid.
>
> Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
> ---
> This patch depends on the following to avoid conflicts:
> https://lore.kernel.org/lkml/20260802100101.327815-1-amadeus@jmu.edu.cn/
> ---
> .../boot/dts/spacemit/k1-orangepi-r2s.dts | 30 ++++++++++++++++++
> .../boot/dts/spacemit/k1-orangepi-rv2.dts | 31 +++++++++++++++++++
> 2 files changed, 61 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
> index 2d1ba34cb00e..7125f2882ce8 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
> @@ -13,6 +13,7 @@ / {
> compatible = "xunlong,orangepi-r2s", "spacemit,k1";
>
> aliases {
> + i2c2 = &i2c2;
> i2c8 = &i2c8;
> serial0 = &uart0;
> ethernet0 = ð0;
> @@ -112,6 +113,35 @@ rgmii1: phy@1 {
> };
> };
>
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_0_cfg>;
> + status = "okay";
> +
> + eeprom@50 {
> + compatible = "atmel,24c02";
> + reg = <0x50>;
> + pagesize = <16>;
> + size = <256>;
> + read-only;
> + vcc-supply = <&buck3_1v8>;
> +
> + nvmem-layout {
> + compatible = "onie,tlv-layout";
> +
> + mac-address {
> + #nvmem-cell-cells = <1>;
> + };
> +
> + num-macs {
> + };
> +
> + product-name {
> + };
> + };
> + };
> +};
> +
> &i2c8 {
> pinctrl-names = "default";
> pinctrl-0 = <&i2c8_cfg>;
> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> index f7547a4da71a..837616255464 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> @@ -17,6 +17,8 @@ aliases {
> serial0 = &uart0;
> ethernet0 = ð0;
> ethernet1 = ð1;
> + i2c2 = &i2c2;
> + i2c8 = &i2c8;
> mmc0 = &emmc;
> mmc1 = &sdhci0;
> };
> @@ -138,6 +140,35 @@ rgmii1: phy@1 {
> };
> };
>
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_0_cfg>;
> + status = "okay";
> +
> + eeprom@50 {
> + compatible = "atmel,24c02";
> + reg = <0x50>;
> + pagesize = <16>;
> + size = <256>;
> + read-only;
> + vcc-supply = <&buck3_1v8>;
> +
> + nvmem-layout {
> + compatible = "onie,tlv-layout";
> +
> + mac-address {
> + #nvmem-cell-cells = <1>;
> + };
> +
> + num-macs {
> + };
> +
> + product-name {
> + };
> + };
> + };
> +};
> +
> &i2c8 {
> pinctrl-names = "default";
> pinctrl-0 = <&i2c8_cfg>;
Hi Chukun,
I have tested this patch on an OrangePi RV2 with a kernel built from
linux-next (next-20260904).
With the patch applied, the i2c2 bus comes up and a 24C02-compatible
EEPROM (256 bytes) is probed at 2-0050. Reading the raw contents via
hexdump -C /sys/bus/nvmem/devices/2-00500/nvmem
shows a valid ONIE TlvInfo table, and the nvmem cells
(product-name, mac-address, num-macs, crc32) are properly exposed.
The Product Name field reads "x1_orangepi-rv2", which matches this
board.
Tested-by: Gong Shuai <gsh517025@gmail.com> # OrangePi-RV2
I also tested the MAC address wiring below on top of this patch, with
the nvmem-cells references added to eth0/eth1, eth0 picks up the base
MAC address stored in the EEPROM and eth1 gets the base + 1; both
addresses stay stable across reboots.
diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
index 837616255464..44b81268c802 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
@@ -93,6 +93,8 @@ &emmc {
};
ð0 {
+ nvmem-cells = <&mac_address 0>;
+ nvmem-cell-names = "mac-address";
phy-handle = <&rgmii0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
@@ -117,6 +119,8 @@ rgmii0: phy@1 {
};
ð1 {
+ nvmem-cells = <&mac_address 1>;
+ nvmem-cell-names = "mac-address";
phy-handle = <&rgmii1>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
@@ -156,7 +160,7 @@ eeprom@50 {
nvmem-layout {
compatible = "onie,tlv-layout";
- mac-address {
+ mac_address: mac-address {
#nvmem-cell-cells = <1>;
};
But I am not sure whether this wiring should be part of this patch.
Without such wiring, the kernel falls back to random MAC addresses
on this board.
Best regards,
Shuai
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