Re: [PATCH v8 01/20] arm64: dts: mediatek: Add GCE header for MT8196

[AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>]

Il 17/10/25 08:44, Jason-JH Lin ha scritto:
> Add GCE header define for GCE Thread Priority and GCE Event IDs
> that used in the MT8196 dtsi.
> 
> Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8196-gce.h | 612 ++++++++++++++++++++++
>   1 file changed, 612 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/mediatek/mt8196-gce.h
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8196-gce.h b/arch/arm64/boot/dts/mediatek/mt8196-gce.h
> new file mode 100644
> index 000000000000..457dc73aeed3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8196-gce.h
> @@ -0,0 +1,612 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * Copyright (c) 2025 MediaTek Inc.
> + *
> + */
> +
> +#ifndef __DTS_GCE_MT8196_H
> +#define __DTS_GCE_MT8196_H
> +
> +/* GCE Thread Priority
> + * The GCE core has multiple GCE threads, each of which can independently
> + * execute its own sequence of instructions.
> + * However, the GCE threads on the same core cannot run in parallel.
> + * Different GCE threads can determine thread priority based on the scenario,
> + * thereby serving different user needs.
> + *
> + * Low priority thread is executed when no high priority thread is active.
> + * Same priority thread is scheduled by round robin.
> + */
> +#define CMDQ_THR_PRIO_LOWEST	0
> +#define CMDQ_THR_PRIO_1		1
> +#define CMDQ_THR_PRIO_2		2
> +#define CMDQ_THR_PRIO_3		3
> +#define CMDQ_THR_PRIO_4		4
> +#define CMDQ_THR_PRIO_5		5
> +#define CMDQ_THR_PRIO_6		6
> +#define CMDQ_THR_PRIO_HIGHEST	7
> +
> +/*
> + * GCE0 Hardware Event IDs
> + * Different SoCs will have varying numbers of hardware event signals,
> + * which are sent from the corresponding hardware to the GCE.
> + * Each hardware event signal corresponds to an event ID in the GCE.
> + * The CMDQ driver can use the following event ID definitions to allow
> + * the client driver to use wait and clear APIs provided by CMDQ, enabling
> + * the GCE to execute operations in the instructions for that event ID.
> + *
> + * The event IDs of GCE0 are mainly used by display hardware.

..snip..

> +/* CMDQ_EVENT_MML1_FRAME_DONE_SEL0 ~ 15: 284 ~ 299 */
> +#define CMDQ_EVENT_MML1_FRAME_DONE_SEL(n)					(284 + (n))
> +/* CMDQ_EVENT_MML1_REG_UPDATE_DONE_ENG_EVENT0 ~ 15: 300 ~ 315 */
> +#define CMDQ_EVENT_MML1_REG_UPDATE_DONE_ENG_EVENT0				(300 + (n))
                                                     ^^^^^
There's a typo here                                  (n)

Please fix, after which

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>