Re: [PATCH net-next v7 3/3] net: dsa: yt921x: Add support for Motorcomm YT921x

[Andrew Lunn <andrew@lunn.ch>]

> +/* Prepare for read/write operations. Not a lock primitive despite underlying
> + * implementations may perform a lock (could be a no-op if the bus supports
> + * native atomic operations on internal ASIC registers).

It is more than atomic operations. Look at how long you hold the
lock. It is not a simple read/modify/write, you hold it over multiple
reads and writes. If the ASIC provided some sort of locking, it would
be available for MDIO, I2C, and SPI, and probably mean additional bus
transactions.

> + *
> + * To serialize register operations, use yt921x_lock() instead.
> + */
> +static void yt921x_reg_acquire(struct yt921x_priv *priv)
> +{
> +	if (priv->smi_ops->acquire)
> +		priv->smi_ops->acquire(priv->smi_ctx);
> +}

So, as i said in my review to previous versions, skip the if and just
take the mutex. KISS. I would not even call mutex_lock(priv->lock);
Don't over engineer the solution, this will probably work for I2C and
SPI as well.

> +/* You should manage the bus ownership yourself and use yt921x_reg_read()
> + * directly, except for register polling with read_poll_timeout(); see examples
> + * below.
> + */
> +static int yt921x_reg_read_managed(struct yt921x_priv *priv, u32 reg, u32 *valp)
> +{
> +	int res;
> +
> +	yt921x_reg_acquire(priv);
> +	res = yt921x_reg_read(priv, reg, valp);
> +	yt921x_reg_release(priv);
> +
> +	return res;
> +}

Sorry, i missed your reply to my comment to the previous version. You
said:

> The driver itself does not need an explicit lock (so long as dsa
> framework does not call two conflicting methods on the same port),

The DSA framework makes no such guarantees. The DSA framework is also
not the only entry point into the driver, phylink will directly call
into the driver, and if you implement things like LEDs, they will have
direct access to the driver.

So i suggest only having a high level lock, acquired on entry,
released on exit, e.g. as mv88e6xxx does. KISS.

    Andrew

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pw-bot: cr