From: Philipp Zabel <p.zabel@pengutronix.de>
To: Biju <biju.das.au@gmail.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Bartosz Golaszewski <brgl@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 1/3] soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power sequencer
Date: Mon, 27 Jul 2026 09:57:50 +0200 [thread overview]
Message-ID: <4f8564aad166a3e64dab2caa550938b6c5ec8038.camel@pengutronix.de> (raw)
In-Reply-To: <20260725123433.162348-2-biju.das.jz@bp.renesas.com>
On Sa, 2026-07-25 at 13:34 +0100, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that is controlled
> through a power sequencer rather than directly by the SYSC driver.
>
> Add a pwrrdy_pwrseq flag to struct rz_sysc_soc_id_init_data to mark
> SoCs with this property, and set it for RZ/G3L. When set,
> rz_sysc_probe() registers a "pwrseq-pwrrdy" auxiliary device so a
> dedicated driver can handle the PWRRDY sequencing, with automatic
> teardown via devm_add_action_or_reset().
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> drivers/soc/renesas/r9a08g046-sysc.c | 1 +
> drivers/soc/renesas/rz-sysc.c | 40 ++++++++++++++++++++++++++++
> drivers/soc/renesas/rz-sysc.h | 2 ++
> 3 files changed, 43 insertions(+)
>
> diff --git a/drivers/soc/renesas/r9a08g046-sysc.c b/drivers/soc/renesas/r9a08g046-sysc.c
> index 90db9d383539..cd129c727461 100644
> --- a/drivers/soc/renesas/r9a08g046-sysc.c
> +++ b/drivers/soc/renesas/r9a08g046-sysc.c
> @@ -76,6 +76,7 @@ static const struct rz_sysc_soc_id_init_data rzg3l_sysc_soc_id_init_data __initc
> .devid_offset = 0xa04,
> .revision_mask = GENMASK(31, 28),
> .specific_id_mask = GENMASK(27, 0),
> + .pwrrdy_pwrseq = true,
> };
>
> const struct rz_sysc_init_data rzg3l_sysc_init_data __initconst = {
> diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c
> index 161e8c38eea6..ea49ca51e740 100644
> --- a/drivers/soc/renesas/rz-sysc.c
> +++ b/drivers/soc/renesas/rz-sysc.c
> @@ -5,6 +5,7 @@
> * Copyright (C) 2024 Renesas Electronics Corp.
> */
>
> +#include <linux/auxiliary_bus.h>
> #include <linux/bitfield.h>
> #include <linux/cleanup.h>
> #include <linux/io.h>
> @@ -84,6 +85,41 @@ static int rz_sysc_soc_init(struct rz_sysc *sysc, const struct of_device_id *mat
> return 0;
> }
>
> +static void rz_sysc_pwrrdy_pwrseq_unregister_adev(void *adev)
> +{
> + auxiliary_device_delete(adev);
> + auxiliary_device_uninit(adev);
> +}
> +
> +static int rz_sysc_pwrrdy_pwrseq_init(struct device *dev, const struct rz_sysc_init_data *data)
> +{
> + const struct rz_sysc_soc_id_init_data *soc_data = data->soc_id_init_data;
> + struct auxiliary_device *adev;
> + int ret;
> +
> + if (!soc_data->pwrrdy_pwrseq)
> + return 0;
> +
> + adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL);
The lifetime of this allocation should be tied to adev->dev, not its
parent. Can't you just use devm_auxiliary_device_create() though?
> + if (!adev)
> + return -ENOMEM;
> +
> + adev->name = "pwrseq-pwrrdy";
> + adev->dev.parent = dev;
> +
> + ret = auxiliary_device_init(adev);
> + if (ret)
> + return ret;
> +
> + ret = auxiliary_device_add(adev);
> + if (ret) {
> + auxiliary_device_uninit(adev);
> + return ret;
> + }
> +
> + return devm_add_action_or_reset(dev, rz_sysc_pwrrdy_pwrseq_unregister_adev, adev);
> +}
regards
Philipp
next prev parent reply other threads:[~2026-07-27 7:57 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-25 12:34 [PATCH 0/3] soc: renesas: rz-sysc: Add RZ/G3L PWRRDY power sequencing support Biju
2026-07-25 12:34 ` [PATCH 1/3] soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power sequencer Biju
2026-07-27 7:57 ` Philipp Zabel [this message]
2026-07-27 10:41 ` Biju Das
2026-07-25 12:34 ` [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver Biju
2026-07-28 8:45 ` Bartosz Golaszewski
2026-07-28 9:17 ` Biju Das
2026-07-28 11:34 ` Bartosz Golaszewski
2026-07-28 11:55 ` Biju Das
2026-07-28 14:21 ` Bartosz Golaszewski
2026-07-28 14:38 ` Biju Das
2026-07-29 13:09 ` Bartosz Golaszewski
2026-07-29 14:33 ` Biju Das
2026-07-30 8:52 ` Bartosz Golaszewski
2026-08-01 13:06 ` Biju Das
2026-07-25 12:34 ` [PATCH 3/3] soc: renesas: Kconfig: Select POWER_SEQUENCING_RENESAS_PWRRDY for R9A08G046 Biju
2026-07-25 12:43 ` [PATCH 0/3] soc: renesas: rz-sysc: Add RZ/G3L PWRRDY power sequencing support Biju Das
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