[PATCH 0/3] soc: renesas: rz-sysc: Add RZ/G3L PWRRDY power sequencing support

[PATCH 0/3] soc: renesas: rz-sysc: Add RZ/G3L PWRRDY power sequencing support

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

Hi all,

Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that signals power
readiness for various IPs (USB, DSI, CSI, etc.) to their respective
controllers. This register is part of the SYSC IP. Add a dedicated
power sequencing driver to handle these signals.

This series adds that support:

- Patch 1 adds a pwrrdy_pwrseq flag to struct rz_sysc_soc_id_init_data,
  sets it for RZ/G3L, and has the SYSC driver register a
  "pwrseq-pwrrdy" auxiliary device when the flag is set, so a
  dedicated driver can bind to it and handle the sequencing.

- Patch 2 adds that dedicated driver, pwrseq-renesas-pwrrdy, which
  binds to the auxiliary device exposed by patch 1 and exposes
  usb-pwrrdy, dsi-pwrrdy, and csi-pwrrdy pwrseq targets, toggling the
  appropriate bits in the SYS_PWRRDY_N register via the parent SYSC
  driver's regmap.

- Patch 3 selects POWER_SEQUENCING_RENESAS_PWRRDY from
  SYSC_R9A08G046 so the new driver is built whenever RZ/G3L SYSC
  support is enabled.
  
This series is based on proposal for power sequence driver [1]
for USB PWRRDY signal and DSI PWRRDY signal[2].

I will send USB/DSI/CSI driver patches based on this series soon.
 
 [1] https://lore.kernel.org/all/CAPDyKFpLnREr4C=wZ7o8Lb-CZbQa4Nr2VTuYdZHZ26Rcb1Masg@mail.gmail.com/ 
 [2] https://lore.kernel.org/all/20260704093433.273672-1-biju.das.jz@bp.renesas.com/T/#mb6f18d8fa9a194fc0a15db5f4938df420da7b6b5

Biju Das (3):
  soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power
    sequencer
  power: sequencing: Add Renesas RZ/G3L Power Ready driver
  soc: renesas: Kconfig: Select POWER_SEQUENCING_RENESAS_PWRRDY for
    R9A08G046

 drivers/power/sequencing/Kconfig              |   8 +
 drivers/power/sequencing/Makefile             |   1 +
 .../power/sequencing/pwrseq-renesas-pwrrdy.c  | 141 ++++++++++++++++++
 drivers/soc/renesas/Kconfig                   |   1 +
 drivers/soc/renesas/r9a08g046-sysc.c          |   1 +
 drivers/soc/renesas/rz-sysc.c                 |  40 +++++
 drivers/soc/renesas/rz-sysc.h                 |   2 +
 7 files changed, 194 insertions(+)
 create mode 100644 drivers/power/sequencing/pwrseq-renesas-pwrrdy.c

-- 
2.43.0

[PATCH 1/3] soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power sequencer

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that is controlled
through a power sequencer rather than directly by the SYSC driver.

Add a pwrrdy_pwrseq flag to struct rz_sysc_soc_id_init_data to mark
SoCs with this property, and set it for RZ/G3L. When set,
rz_sysc_probe() registers a "pwrseq-pwrrdy" auxiliary device so a
dedicated driver can handle the PWRRDY sequencing, with automatic
teardown via devm_add_action_or_reset().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/soc/renesas/r9a08g046-sysc.c |  1 +
 drivers/soc/renesas/rz-sysc.c        | 40 ++++++++++++++++++++++++++++
 drivers/soc/renesas/rz-sysc.h        |  2 ++
 3 files changed, 43 insertions(+)

diff --git a/drivers/soc/renesas/r9a08g046-sysc.c b/drivers/soc/renesas/r9a08g046-sysc.c
index 90db9d383539..cd129c727461 100644
--- a/drivers/soc/renesas/r9a08g046-sysc.c
+++ b/drivers/soc/renesas/r9a08g046-sysc.c
@@ -76,6 +76,7 @@ static const struct rz_sysc_soc_id_init_data rzg3l_sysc_soc_id_init_data __initc
 	.devid_offset = 0xa04,
 	.revision_mask = GENMASK(31, 28),
 	.specific_id_mask = GENMASK(27, 0),
+	.pwrrdy_pwrseq = true,
 };
 
 const struct rz_sysc_init_data rzg3l_sysc_init_data __initconst = {
diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c
index 161e8c38eea6..ea49ca51e740 100644
--- a/drivers/soc/renesas/rz-sysc.c
+++ b/drivers/soc/renesas/rz-sysc.c
@@ -5,6 +5,7 @@
  * Copyright (C) 2024 Renesas Electronics Corp.
  */
 
+#include <linux/auxiliary_bus.h>
 #include <linux/bitfield.h>
 #include <linux/cleanup.h>
 #include <linux/io.h>
@@ -84,6 +85,41 @@ static int rz_sysc_soc_init(struct rz_sysc *sysc, const struct of_device_id *mat
 	return 0;
 }
 
+static void rz_sysc_pwrrdy_pwrseq_unregister_adev(void *adev)
+{
+	auxiliary_device_delete(adev);
+	auxiliary_device_uninit(adev);
+}
+
+static int rz_sysc_pwrrdy_pwrseq_init(struct device *dev, const struct rz_sysc_init_data *data)
+{
+	const struct rz_sysc_soc_id_init_data *soc_data = data->soc_id_init_data;
+	struct auxiliary_device *adev;
+	int ret;
+
+	if (!soc_data->pwrrdy_pwrseq)
+		return 0;
+
+	adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL);
+	if (!adev)
+		return -ENOMEM;
+
+	adev->name = "pwrseq-pwrrdy";
+	adev->dev.parent = dev;
+
+	ret = auxiliary_device_init(adev);
+	if (ret)
+		return ret;
+
+	ret = auxiliary_device_add(adev);
+	if (ret) {
+		auxiliary_device_uninit(adev);
+		return ret;
+	}
+
+	return devm_add_action_or_reset(dev, rz_sysc_pwrrdy_pwrseq_unregister_adev, adev);
+}
+
 static const struct of_device_id rz_sysc_match[] = {
 #ifdef CONFIG_SYSC_R9A08G045
 	{ .compatible = "renesas,r9a08g045-sysc", .data = &rzg3s_sysc_init_data },
@@ -149,6 +185,10 @@ static int rz_sysc_probe(struct platform_device *pdev)
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 
+	ret = rz_sysc_pwrrdy_pwrseq_init(dev, match->data);
+	if (ret)
+		return ret;
+
 	return of_syscon_register_regmap(dev->of_node, regmap);
 }
 
diff --git a/drivers/soc/renesas/rz-sysc.h b/drivers/soc/renesas/rz-sysc.h
index 921ee0d26c47..e55f3258d703 100644
--- a/drivers/soc/renesas/rz-sysc.h
+++ b/drivers/soc/renesas/rz-sysc.h
@@ -20,6 +20,7 @@
  * @revision_mask: SYSC SoC ID revision mask
  * @specific_id_mask: SYSC SoC ID specific ID mask
  * @print_id: print SoC-specific extended device identification
+ * @pwrrdy_pwrseq: has pwrrdy register controlled through power sequencer
  */
 struct rz_sysc_soc_id_init_data {
 	const char * const family;
@@ -29,6 +30,7 @@ struct rz_sysc_soc_id_init_data {
 	u32 specific_id_mask;
 	void (*print_id)(struct device *dev, void __iomem *sysc_base,
 			 struct soc_device_attribute *soc_dev_attr);
+	bool pwrrdy_pwrseq;
 };
 
 /**
-- 
2.43.0

Re: [PATCH 1/3] soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power sequencer

[Philipp Zabel]

On Sa, 2026-07-25 at 13:34 +0100, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that is controlled
> through a power sequencer rather than directly by the SYSC driver.
> 
> Add a pwrrdy_pwrseq flag to struct rz_sysc_soc_id_init_data to mark
> SoCs with this property, and set it for RZ/G3L. When set,
> rz_sysc_probe() registers a "pwrseq-pwrrdy" auxiliary device so a
> dedicated driver can handle the PWRRDY sequencing, with automatic
> teardown via devm_add_action_or_reset().
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  drivers/soc/renesas/r9a08g046-sysc.c |  1 +
>  drivers/soc/renesas/rz-sysc.c        | 40 ++++++++++++++++++++++++++++
>  drivers/soc/renesas/rz-sysc.h        |  2 ++
>  3 files changed, 43 insertions(+)
> 
> diff --git a/drivers/soc/renesas/r9a08g046-sysc.c b/drivers/soc/renesas/r9a08g046-sysc.c
> index 90db9d383539..cd129c727461 100644
> --- a/drivers/soc/renesas/r9a08g046-sysc.c
> +++ b/drivers/soc/renesas/r9a08g046-sysc.c
> @@ -76,6 +76,7 @@ static const struct rz_sysc_soc_id_init_data rzg3l_sysc_soc_id_init_data __initc
>  	.devid_offset = 0xa04,
>  	.revision_mask = GENMASK(31, 28),
>  	.specific_id_mask = GENMASK(27, 0),
> +	.pwrrdy_pwrseq = true,
>  };
>  
>  const struct rz_sysc_init_data rzg3l_sysc_init_data __initconst = {
> diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c
> index 161e8c38eea6..ea49ca51e740 100644
> --- a/drivers/soc/renesas/rz-sysc.c
> +++ b/drivers/soc/renesas/rz-sysc.c
> @@ -5,6 +5,7 @@
>   * Copyright (C) 2024 Renesas Electronics Corp.
>   */
>  
> +#include <linux/auxiliary_bus.h>
>  #include <linux/bitfield.h>
>  #include <linux/cleanup.h>
>  #include <linux/io.h>
> @@ -84,6 +85,41 @@ static int rz_sysc_soc_init(struct rz_sysc *sysc, const struct of_device_id *mat
>  	return 0;
>  }
>  
> +static void rz_sysc_pwrrdy_pwrseq_unregister_adev(void *adev)
> +{
> +	auxiliary_device_delete(adev);
> +	auxiliary_device_uninit(adev);
> +}
> +
> +static int rz_sysc_pwrrdy_pwrseq_init(struct device *dev, const struct rz_sysc_init_data *data)
> +{
> +	const struct rz_sysc_soc_id_init_data *soc_data = data->soc_id_init_data;
> +	struct auxiliary_device *adev;
> +	int ret;
> +
> +	if (!soc_data->pwrrdy_pwrseq)
> +		return 0;
> +
> +	adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL);

The lifetime of this allocation should be tied to adev->dev, not its
parent. Can't you just use devm_auxiliary_device_create() though?

> +	if (!adev)
> +		return -ENOMEM;
> +
> +	adev->name = "pwrseq-pwrrdy";
> +	adev->dev.parent = dev;
> +
> +	ret = auxiliary_device_init(adev);
> +	if (ret)
> +		return ret;
> +
> +	ret = auxiliary_device_add(adev);
> +	if (ret) {
> +		auxiliary_device_uninit(adev);
> +		return ret;
> +	}
> +
> +	return devm_add_action_or_reset(dev, rz_sysc_pwrrdy_pwrseq_unregister_adev, adev);
> +}

regards
Philipp

RE: [PATCH 1/3] soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power sequencer

[Biju Das]

Hi Philipp Zabel,

Thanks for the feedback.

> -----Original Message-----
> From: Philipp Zabel <p.zabel@pengutronix.de>
> Sent: 27 July 2026 08:58
> Subject: Re: [PATCH 1/3] soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power sequencer
> 
> On Sa, 2026-07-25 at 13:34 +0100, Biju wrote:
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that is controlled
> > through a power sequencer rather than directly by the SYSC driver.
> >
> > Add a pwrrdy_pwrseq flag to struct rz_sysc_soc_id_init_data to mark
> > SoCs with this property, and set it for RZ/G3L. When set,
> > rz_sysc_probe() registers a "pwrseq-pwrrdy" auxiliary device so a
> > dedicated driver can handle the PWRRDY sequencing, with automatic
> > teardown via devm_add_action_or_reset().
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> >  drivers/soc/renesas/r9a08g046-sysc.c |  1 +
> >  drivers/soc/renesas/rz-sysc.c        | 40 ++++++++++++++++++++++++++++
> >  drivers/soc/renesas/rz-sysc.h        |  2 ++
> >  3 files changed, 43 insertions(+)
> >
> > diff --git a/drivers/soc/renesas/r9a08g046-sysc.c
> > b/drivers/soc/renesas/r9a08g046-sysc.c
> > index 90db9d383539..cd129c727461 100644
> > --- a/drivers/soc/renesas/r9a08g046-sysc.c
> > +++ b/drivers/soc/renesas/r9a08g046-sysc.c
> > @@ -76,6 +76,7 @@ static const struct rz_sysc_soc_id_init_data rzg3l_sysc_soc_id_init_data __initc
> >  	.devid_offset = 0xa04,
> >  	.revision_mask = GENMASK(31, 28),
> >  	.specific_id_mask = GENMASK(27, 0),
> > +	.pwrrdy_pwrseq = true,
> >  };
> >
> >  const struct rz_sysc_init_data rzg3l_sysc_init_data __initconst = {
> > diff --git a/drivers/soc/renesas/rz-sysc.c
> > b/drivers/soc/renesas/rz-sysc.c index 161e8c38eea6..ea49ca51e740
> > 100644
> > --- a/drivers/soc/renesas/rz-sysc.c
> > +++ b/drivers/soc/renesas/rz-sysc.c
> > @@ -5,6 +5,7 @@
> >   * Copyright (C) 2024 Renesas Electronics Corp.
> >   */
> >
> > +#include <linux/auxiliary_bus.h>
> >  #include <linux/bitfield.h>
> >  #include <linux/cleanup.h>
> >  #include <linux/io.h>
> > @@ -84,6 +85,41 @@ static int rz_sysc_soc_init(struct rz_sysc *sysc, const struct of_device_id *mat
> >  	return 0;
> >  }
> >
> > +static void rz_sysc_pwrrdy_pwrseq_unregister_adev(void *adev) {
> > +	auxiliary_device_delete(adev);
> > +	auxiliary_device_uninit(adev);
> > +}
> > +
> > +static int rz_sysc_pwrrdy_pwrseq_init(struct device *dev, const
> > +struct rz_sysc_init_data *data) {
> > +	const struct rz_sysc_soc_id_init_data *soc_data = data->soc_id_init_data;
> > +	struct auxiliary_device *adev;
> > +	int ret;
> > +
> > +	if (!soc_data->pwrrdy_pwrseq)
> > +		return 0;
> > +
> > +	adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL);
> 
> The lifetime of this allocation should be tied to adev->dev, not its parent. Can't you just use
> devm_auxiliary_device_create() though?

Agreed. Will switch to devm_auxiliary_device_create().

Cheers,
Biju

[PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

Add a power sequencing driver for the Renesas RZ/G3L PWRRDY module,
which signals power readiness for various IPs (USB, DSI, CSI etc.) on the
SoC. The driver binds as an auxiliary device to the parent SYSC driver,
using its regmap to toggle the SYS_PWRRDY_N register bits, and exposes
{usb,dsi,csi}-pwrrdy pwrseq targets.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/power/sequencing/Kconfig              |   8 +
 drivers/power/sequencing/Makefile             |   1 +
 .../power/sequencing/pwrseq-renesas-pwrrdy.c  | 141 ++++++++++++++++++
 3 files changed, 150 insertions(+)
 create mode 100644 drivers/power/sequencing/pwrseq-renesas-pwrrdy.c

diff --git a/drivers/power/sequencing/Kconfig b/drivers/power/sequencing/Kconfig
index 1c5f5820f5b7..245961cc8123 100644
--- a/drivers/power/sequencing/Kconfig
+++ b/drivers/power/sequencing/Kconfig
@@ -27,6 +27,14 @@ config POWER_SEQUENCING_QCOM_WCN
 	  this driver is needed for correct power control or else we'd risk not
 	  respecting the required delays between enabling Bluetooth and WLAN.
 
+config POWER_SEQUENCING_RENESAS_PWRRDY
+	tristate "Renesas Power Ready sequencing driver"
+	depends on SYSC_RZ || COMPILE_TEST
+	help
+	  Say Y here to enable the power sequencing driver for the Renesas
+	  Power Ready signals. This driver handles the power ready signals
+	  required to power on the various IP's on RZ/G3L platform.
+
 config POWER_SEQUENCING_TH1520_GPU
 	tristate "T-HEAD TH1520 GPU power sequencing driver"
 	depends on (ARCH_THEAD && AUXILIARY_BUS) || COMPILE_TEST
diff --git a/drivers/power/sequencing/Makefile b/drivers/power/sequencing/Makefile
index 0911d4618298..b33d08d82f43 100644
--- a/drivers/power/sequencing/Makefile
+++ b/drivers/power/sequencing/Makefile
@@ -4,5 +4,6 @@ obj-$(CONFIG_POWER_SEQUENCING)		+= pwrseq-core.o
 pwrseq-core-y				:= core.o
 
 obj-$(CONFIG_POWER_SEQUENCING_QCOM_WCN)	+= pwrseq-qcom-wcn.o
+obj-$(CONFIG_POWER_SEQUENCING_RENESAS_PWRRDY) += pwrseq-renesas-pwrrdy.o
 obj-$(CONFIG_POWER_SEQUENCING_TH1520_GPU) += pwrseq-thead-gpu.o
 obj-$(CONFIG_POWER_SEQUENCING_PCIE_M2)	+= pwrseq-pcie-m2.o
diff --git a/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c b/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
new file mode 100644
index 000000000000..a3d187dd3247
--- /dev/null
+++ b/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas RZ/G3L Power Ready driver
+ *
+ */
+
+#include <linux/auxiliary_bus.h>
+#include <linux/module.h>
+#include <linux/pwrseq/provider.h>
+#include <linux/regmap.h>
+
+#define SYS_PWRRDY_N		0xd70
+#define SYS_PWRRDY_N_USB_MASK	BIT(0)
+#define SYS_PWRRDY_N_DSI_MASK	BIT(1)
+#define SYS_PWRRDY_N_CSI_MASK	BIT(2)
+
+static int pwrseq_rzg3l_set_pwrrdy(struct pwrseq_device *pwrseq, u32 mask, u32 val)
+{
+	struct regmap *regmap = pwrseq_device_get_drvdata(pwrseq);
+
+	return regmap_update_bits(regmap, SYS_PWRRDY_N, mask, val);
+}
+
+static int pwrseq_rzg3l_usb_pwrrdy_enable(struct pwrseq_device *pwrseq)
+{
+	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_USB_MASK, 0);
+}
+
+static int pwrseq_rzg3l_usb_pwrrdy_disable(struct pwrseq_device *pwrseq)
+{
+	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_USB_MASK, 1);
+}
+
+static const struct pwrseq_unit_data pwrseq_rzg3l_usb_pwrrdy_unit = {
+	.name = "usb-pwrrdy-power-sequence",
+	.enable = pwrseq_rzg3l_usb_pwrrdy_enable,
+	.disable = pwrseq_rzg3l_usb_pwrrdy_disable,
+};
+
+static int pwrseq_rzg3l_dsi_pwrrdy_enable(struct pwrseq_device *pwrseq)
+{
+	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_DSI_MASK, 0);
+}
+
+static int pwrseq_rzg3l_dsi_pwrrdy_disable(struct pwrseq_device *pwrseq)
+{
+	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_DSI_MASK, 1);
+}
+
+static const struct pwrseq_unit_data pwrseq_rzg3l_dsi_pwrrdy_unit = {
+	.name = "dsi-pwrrdy-sequence",
+	.enable = pwrseq_rzg3l_dsi_pwrrdy_enable,
+	.disable = pwrseq_rzg3l_dsi_pwrrdy_disable,
+};
+
+static int pwrseq_rzg3l_csi_pwrrdy_enable(struct pwrseq_device *pwrseq)
+{
+	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_CSI_MASK, 0);
+}
+
+static int pwrseq_rzg3l_csi_pwrrdy_disable(struct pwrseq_device *pwrseq)
+{
+	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_CSI_MASK, 1);
+}
+
+static const struct pwrseq_unit_data pwrseq_rzg3l_csi_pwrrdy_unit = {
+	.name = "csi-pwrrdy-power-sequence",
+	.enable = pwrseq_rzg3l_csi_pwrrdy_enable,
+	.disable = pwrseq_rzg3l_csi_pwrrdy_disable,
+};
+
+static const struct pwrseq_target_data pwrseq_rzg3l_usb_pwrrdy_target = {
+	.name = "usb-pwrrdy",
+	.unit = &pwrseq_rzg3l_usb_pwrrdy_unit,
+};
+
+static const struct pwrseq_target_data pwrseq_rzg3l_dsi_pwrrdy_target = {
+	.name = "dsi-pwrrdy",
+	.unit = &pwrseq_rzg3l_dsi_pwrrdy_unit,
+};
+
+static const struct pwrseq_target_data pwrseq_rzg3l_csi_pwrrdy_target = {
+	.name = "csi-pwrrdy",
+	.unit = &pwrseq_rzg3l_csi_pwrrdy_unit,
+};
+
+static const struct pwrseq_target_data *pwrseq_rzg3l_pwrrdy_targets[] = {
+	&pwrseq_rzg3l_usb_pwrrdy_target,
+	&pwrseq_rzg3l_dsi_pwrrdy_target,
+	&pwrseq_rzg3l_csi_pwrrdy_target,
+	NULL
+};
+
+static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
+				     struct device *dev)
+{
+	return PWRSEQ_MATCH_OK;
+}
+
+static int pwrseq_rzg3l_pwrrdy_probe(struct auxiliary_device *adev,
+				     const struct auxiliary_device_id *id)
+{
+	struct device *dev = &adev->dev;
+	struct pwrseq_config config = {};
+	struct pwrseq_device *pwrseq;
+	struct regmap *regmap;
+
+	regmap = dev_get_regmap(adev->dev.parent, NULL);
+	if (!regmap)
+		return dev_err_probe(dev, -ENODEV, "Failed to retrieve parent regmap\n");
+
+	config.parent = dev;
+	config.owner = THIS_MODULE;
+	config.drvdata = regmap;
+	config.match = pwrseq_rzg3l_pwrrdy_match;
+	config.targets = pwrseq_rzg3l_pwrrdy_targets;
+	pwrseq = devm_pwrseq_device_register(dev, &config);
+	if (IS_ERR(pwrseq))
+		return dev_err_probe(dev, PTR_ERR(pwrseq), "Failed to register power sequencer\n");
+
+	return 0;
+}
+
+static const struct auxiliary_device_id pwrseq_rzg3l_pwrrdy_id_table[] = {
+	{ .name = "rz_sysc.pwrseq-pwrrdy" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(auxiliary, pwrseq_rzg3l_pwrrdy_id_table);
+
+static struct auxiliary_driver pwrseq_rzg3l_pwrrdy_driver = {
+	.driver = {
+		.name = "pwrseq-rzg3l-pwrrdy",
+	},
+	.probe = pwrseq_rzg3l_pwrrdy_probe,
+	.id_table = pwrseq_rzg3l_pwrrdy_id_table,
+};
+module_auxiliary_driver(pwrseq_rzg3l_pwrrdy_driver);
+
+MODULE_AUTHOR("Biju Das <biju.das.jz@bp.renesas.com>");
+MODULE_DESCRIPTION("Renesas RZ/G3L Power Ready Driver");
+MODULE_LICENSE("GPL");
-- 
2.43.0

Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Bartosz Golaszewski]

On Sat, 25 Jul 2026 14:34:29 +0200, Biju <biju.das.au@gmail.com> said:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> Add a power sequencing driver for the Renesas RZ/G3L PWRRDY module,
> which signals power readiness for various IPs (USB, DSI, CSI etc.) on the
> SoC. The driver binds as an auxiliary device to the parent SYSC driver,
> using its regmap to toggle the SYS_PWRRDY_N register bits, and exposes
> {usb,dsi,csi}-pwrrdy pwrseq targets.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  drivers/power/sequencing/Kconfig              |   8 +
>  drivers/power/sequencing/Makefile             |   1 +
>  .../power/sequencing/pwrseq-renesas-pwrrdy.c  | 141 ++++++++++++++++++
>  3 files changed, 150 insertions(+)
>  create mode 100644 drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
>
> diff --git a/drivers/power/sequencing/Kconfig b/drivers/power/sequencing/Kconfig
> index 1c5f5820f5b7..245961cc8123 100644
> --- a/drivers/power/sequencing/Kconfig
> +++ b/drivers/power/sequencing/Kconfig
> @@ -27,6 +27,14 @@ config POWER_SEQUENCING_QCOM_WCN
>  	  this driver is needed for correct power control or else we'd risk not
>  	  respecting the required delays between enabling Bluetooth and WLAN.
>
> +config POWER_SEQUENCING_RENESAS_PWRRDY
> +	tristate "Renesas Power Ready sequencing driver"
> +	depends on SYSC_RZ || COMPILE_TEST
> +	help
> +	  Say Y here to enable the power sequencing driver for the Renesas
> +	  Power Ready signals. This driver handles the power ready signals
> +	  required to power on the various IP's on RZ/G3L platform.
> +
>  config POWER_SEQUENCING_TH1520_GPU
>  	tristate "T-HEAD TH1520 GPU power sequencing driver"
>  	depends on (ARCH_THEAD && AUXILIARY_BUS) || COMPILE_TEST
> diff --git a/drivers/power/sequencing/Makefile b/drivers/power/sequencing/Makefile
> index 0911d4618298..b33d08d82f43 100644
> --- a/drivers/power/sequencing/Makefile
> +++ b/drivers/power/sequencing/Makefile
> @@ -4,5 +4,6 @@ obj-$(CONFIG_POWER_SEQUENCING)		+= pwrseq-core.o
>  pwrseq-core-y				:= core.o
>
>  obj-$(CONFIG_POWER_SEQUENCING_QCOM_WCN)	+= pwrseq-qcom-wcn.o
> +obj-$(CONFIG_POWER_SEQUENCING_RENESAS_PWRRDY) += pwrseq-renesas-pwrrdy.o
>  obj-$(CONFIG_POWER_SEQUENCING_TH1520_GPU) += pwrseq-thead-gpu.o
>  obj-$(CONFIG_POWER_SEQUENCING_PCIE_M2)	+= pwrseq-pcie-m2.o
> diff --git a/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c b/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
> new file mode 100644
> index 000000000000..a3d187dd3247
> --- /dev/null
> +++ b/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
> @@ -0,0 +1,141 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Renesas RZ/G3L Power Ready driver
> + *
> + */
> +
> +#include <linux/auxiliary_bus.h>
> +#include <linux/module.h>
> +#include <linux/pwrseq/provider.h>
> +#include <linux/regmap.h>
> +
> +#define SYS_PWRRDY_N		0xd70
> +#define SYS_PWRRDY_N_USB_MASK	BIT(0)
> +#define SYS_PWRRDY_N_DSI_MASK	BIT(1)
> +#define SYS_PWRRDY_N_CSI_MASK	BIT(2)
> +
> +static int pwrseq_rzg3l_set_pwrrdy(struct pwrseq_device *pwrseq, u32 mask, u32 val)
> +{
> +	struct regmap *regmap = pwrseq_device_get_drvdata(pwrseq);
> +
> +	return regmap_update_bits(regmap, SYS_PWRRDY_N, mask, val);
> +}
> +
> +static int pwrseq_rzg3l_usb_pwrrdy_enable(struct pwrseq_device *pwrseq)
> +{
> +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_USB_MASK, 0);
> +}
> +
> +static int pwrseq_rzg3l_usb_pwrrdy_disable(struct pwrseq_device *pwrseq)
> +{
> +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_USB_MASK, 1);
> +}
> +
> +static const struct pwrseq_unit_data pwrseq_rzg3l_usb_pwrrdy_unit = {
> +	.name = "usb-pwrrdy-power-sequence",
> +	.enable = pwrseq_rzg3l_usb_pwrrdy_enable,
> +	.disable = pwrseq_rzg3l_usb_pwrrdy_disable,
> +};
> +
> +static int pwrseq_rzg3l_dsi_pwrrdy_enable(struct pwrseq_device *pwrseq)
> +{
> +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_DSI_MASK, 0);
> +}
> +
> +static int pwrseq_rzg3l_dsi_pwrrdy_disable(struct pwrseq_device *pwrseq)
> +{
> +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_DSI_MASK, 1);
> +}
> +
> +static const struct pwrseq_unit_data pwrseq_rzg3l_dsi_pwrrdy_unit = {
> +	.name = "dsi-pwrrdy-sequence",
> +	.enable = pwrseq_rzg3l_dsi_pwrrdy_enable,
> +	.disable = pwrseq_rzg3l_dsi_pwrrdy_disable,
> +};
> +
> +static int pwrseq_rzg3l_csi_pwrrdy_enable(struct pwrseq_device *pwrseq)
> +{
> +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_CSI_MASK, 0);
> +}
> +
> +static int pwrseq_rzg3l_csi_pwrrdy_disable(struct pwrseq_device *pwrseq)
> +{
> +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_CSI_MASK, 1);
> +}
> +
> +static const struct pwrseq_unit_data pwrseq_rzg3l_csi_pwrrdy_unit = {
> +	.name = "csi-pwrrdy-power-sequence",
> +	.enable = pwrseq_rzg3l_csi_pwrrdy_enable,
> +	.disable = pwrseq_rzg3l_csi_pwrrdy_disable,
> +};
> +
> +static const struct pwrseq_target_data pwrseq_rzg3l_usb_pwrrdy_target = {
> +	.name = "usb-pwrrdy",
> +	.unit = &pwrseq_rzg3l_usb_pwrrdy_unit,
> +};
> +
> +static const struct pwrseq_target_data pwrseq_rzg3l_dsi_pwrrdy_target = {
> +	.name = "dsi-pwrrdy",
> +	.unit = &pwrseq_rzg3l_dsi_pwrrdy_unit,
> +};
> +
> +static const struct pwrseq_target_data pwrseq_rzg3l_csi_pwrrdy_target = {
> +	.name = "csi-pwrrdy",
> +	.unit = &pwrseq_rzg3l_csi_pwrrdy_unit,
> +};
> +
> +static const struct pwrseq_target_data *pwrseq_rzg3l_pwrrdy_targets[] = {
> +	&pwrseq_rzg3l_usb_pwrrdy_target,
> +	&pwrseq_rzg3l_dsi_pwrrdy_target,
> +	&pwrseq_rzg3l_csi_pwrrdy_target,
> +	NULL
> +};
> +
> +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
> +				     struct device *dev)
> +{
> +	return PWRSEQ_MATCH_OK;

When I see an always-tru match() callback, it always raises an alarm bell.
Typically, I'd expect there to be some validation of the consumer happening.

Please at least provide an explanation of why it's ok.

> +}
> +
> +static int pwrseq_rzg3l_pwrrdy_probe(struct auxiliary_device *adev,
> +				     const struct auxiliary_device_id *id)
> +{
> +	struct device *dev = &adev->dev;
> +	struct pwrseq_config config = {};
> +	struct pwrseq_device *pwrseq;
> +	struct regmap *regmap;
> +
> +	regmap = dev_get_regmap(adev->dev.parent, NULL);
> +	if (!regmap)
> +		return dev_err_probe(dev, -ENODEV, "Failed to retrieve parent regmap\n");
> +
> +	config.parent = dev;
> +	config.owner = THIS_MODULE;
> +	config.drvdata = regmap;
> +	config.match = pwrseq_rzg3l_pwrrdy_match;
> +	config.targets = pwrseq_rzg3l_pwrrdy_targets;

Add newline here.

It wouldn't also hurt to use a compound literal like so:

	config = (struct pwrseq_config){
		.parent = dev,
		...
	};

> +	pwrseq = devm_pwrseq_device_register(dev, &config);
> +	if (IS_ERR(pwrseq))
> +		return dev_err_probe(dev, PTR_ERR(pwrseq), "Failed to register power sequencer\n");
> +

I'd just return devm_pwrseq_device_register() here.

> +	return 0;
> +}
> +
> +static const struct auxiliary_device_id pwrseq_rzg3l_pwrrdy_id_table[] = {
> +	{ .name = "rz_sysc.pwrseq-pwrrdy" },
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(auxiliary, pwrseq_rzg3l_pwrrdy_id_table);
> +
> +static struct auxiliary_driver pwrseq_rzg3l_pwrrdy_driver = {
> +	.driver = {
> +		.name = "pwrseq-rzg3l-pwrrdy",
> +	},
> +	.probe = pwrseq_rzg3l_pwrrdy_probe,
> +	.id_table = pwrseq_rzg3l_pwrrdy_id_table,
> +};
> +module_auxiliary_driver(pwrseq_rzg3l_pwrrdy_driver);
> +
> +MODULE_AUTHOR("Biju Das <biju.das.jz@bp.renesas.com>");
> +MODULE_DESCRIPTION("Renesas RZ/G3L Power Ready Driver");
> +MODULE_LICENSE("GPL");
> --
> 2.43.0
>
>

RE: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Biju Das]

Hi Bartosz Golaszewski,

Thanks for the feedback.

> -----Original Message-----
> From: Bartosz Golaszewski <brgl@kernel.org>
> Sent: 28 July 2026 09:45
> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver
> 
> On Sat, 25 Jul 2026 14:34:29 +0200, Biju <biju.das.au@gmail.com> said:
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > Add a power sequencing driver for the Renesas RZ/G3L PWRRDY module,
> > which signals power readiness for various IPs (USB, DSI, CSI etc.) on
> > the SoC. The driver binds as an auxiliary device to the parent SYSC
> > driver, using its regmap to toggle the SYS_PWRRDY_N register bits, and
> > exposes {usb,dsi,csi}-pwrrdy pwrseq targets.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> >  drivers/power/sequencing/Kconfig              |   8 +
> >  drivers/power/sequencing/Makefile             |   1 +
> >  .../power/sequencing/pwrseq-renesas-pwrrdy.c  | 141
> > ++++++++++++++++++
> >  3 files changed, 150 insertions(+)
> >  create mode 100644 drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
> >
> > diff --git a/drivers/power/sequencing/Kconfig
> > b/drivers/power/sequencing/Kconfig
> > index 1c5f5820f5b7..245961cc8123 100644
> > --- a/drivers/power/sequencing/Kconfig
> > +++ b/drivers/power/sequencing/Kconfig
> > @@ -27,6 +27,14 @@ config POWER_SEQUENCING_QCOM_WCN
> >  	  this driver is needed for correct power control or else we'd risk not
> >  	  respecting the required delays between enabling Bluetooth and WLAN.
> >
> > +config POWER_SEQUENCING_RENESAS_PWRRDY
> > +	tristate "Renesas Power Ready sequencing driver"
> > +	depends on SYSC_RZ || COMPILE_TEST
> > +	help
> > +	  Say Y here to enable the power sequencing driver for the Renesas
> > +	  Power Ready signals. This driver handles the power ready signals
> > +	  required to power on the various IP's on RZ/G3L platform.
> > +
> >  config POWER_SEQUENCING_TH1520_GPU
> >  	tristate "T-HEAD TH1520 GPU power sequencing driver"
> >  	depends on (ARCH_THEAD && AUXILIARY_BUS) || COMPILE_TEST diff --git
> > a/drivers/power/sequencing/Makefile
> > b/drivers/power/sequencing/Makefile
> > index 0911d4618298..b33d08d82f43 100644
> > --- a/drivers/power/sequencing/Makefile
> > +++ b/drivers/power/sequencing/Makefile
> > @@ -4,5 +4,6 @@ obj-$(CONFIG_POWER_SEQUENCING)		+= pwrseq-core.o
> >  pwrseq-core-y				:= core.o
> >
> >  obj-$(CONFIG_POWER_SEQUENCING_QCOM_WCN)	+= pwrseq-qcom-wcn.o
> > +obj-$(CONFIG_POWER_SEQUENCING_RENESAS_PWRRDY) +=
> > +pwrseq-renesas-pwrrdy.o
> >  obj-$(CONFIG_POWER_SEQUENCING_TH1520_GPU) += pwrseq-thead-gpu.o
> >  obj-$(CONFIG_POWER_SEQUENCING_PCIE_M2)	+= pwrseq-pcie-m2.o
> > diff --git a/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
> > b/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
> > new file mode 100644
> > index 000000000000..a3d187dd3247
> > --- /dev/null
> > +++ b/drivers/power/sequencing/pwrseq-renesas-pwrrdy.c
> > @@ -0,0 +1,141 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Renesas RZ/G3L Power Ready driver
> > + *
> > + */
> > +
> > +#include <linux/auxiliary_bus.h>
> > +#include <linux/module.h>
> > +#include <linux/pwrseq/provider.h>
> > +#include <linux/regmap.h>
> > +
> > +#define SYS_PWRRDY_N		0xd70
> > +#define SYS_PWRRDY_N_USB_MASK	BIT(0)
> > +#define SYS_PWRRDY_N_DSI_MASK	BIT(1)
> > +#define SYS_PWRRDY_N_CSI_MASK	BIT(2)
> > +
> > +static int pwrseq_rzg3l_set_pwrrdy(struct pwrseq_device *pwrseq, u32
> > +mask, u32 val) {
> > +	struct regmap *regmap = pwrseq_device_get_drvdata(pwrseq);
> > +
> > +	return regmap_update_bits(regmap, SYS_PWRRDY_N, mask, val); }
> > +
> > +static int pwrseq_rzg3l_usb_pwrrdy_enable(struct pwrseq_device
> > +*pwrseq) {
> > +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_USB_MASK, 0); }
> > +
> > +static int pwrseq_rzg3l_usb_pwrrdy_disable(struct pwrseq_device
> > +*pwrseq) {
> > +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_USB_MASK, 1); }
> > +
> > +static const struct pwrseq_unit_data pwrseq_rzg3l_usb_pwrrdy_unit = {
> > +	.name = "usb-pwrrdy-power-sequence",
> > +	.enable = pwrseq_rzg3l_usb_pwrrdy_enable,
> > +	.disable = pwrseq_rzg3l_usb_pwrrdy_disable, };
> > +
> > +static int pwrseq_rzg3l_dsi_pwrrdy_enable(struct pwrseq_device
> > +*pwrseq) {
> > +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_DSI_MASK, 0); }
> > +
> > +static int pwrseq_rzg3l_dsi_pwrrdy_disable(struct pwrseq_device
> > +*pwrseq) {
> > +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_DSI_MASK, 1); }
> > +
> > +static const struct pwrseq_unit_data pwrseq_rzg3l_dsi_pwrrdy_unit = {
> > +	.name = "dsi-pwrrdy-sequence",
> > +	.enable = pwrseq_rzg3l_dsi_pwrrdy_enable,
> > +	.disable = pwrseq_rzg3l_dsi_pwrrdy_disable, };
> > +
> > +static int pwrseq_rzg3l_csi_pwrrdy_enable(struct pwrseq_device
> > +*pwrseq) {
> > +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_CSI_MASK, 0); }
> > +
> > +static int pwrseq_rzg3l_csi_pwrrdy_disable(struct pwrseq_device
> > +*pwrseq) {
> > +	return pwrseq_rzg3l_set_pwrrdy(pwrseq, SYS_PWRRDY_N_CSI_MASK, 1); }
> > +
> > +static const struct pwrseq_unit_data pwrseq_rzg3l_csi_pwrrdy_unit = {
> > +	.name = "csi-pwrrdy-power-sequence",
> > +	.enable = pwrseq_rzg3l_csi_pwrrdy_enable,
> > +	.disable = pwrseq_rzg3l_csi_pwrrdy_disable, };
> > +
> > +static const struct pwrseq_target_data pwrseq_rzg3l_usb_pwrrdy_target = {
> > +	.name = "usb-pwrrdy",
> > +	.unit = &pwrseq_rzg3l_usb_pwrrdy_unit, };
> > +
> > +static const struct pwrseq_target_data pwrseq_rzg3l_dsi_pwrrdy_target = {
> > +	.name = "dsi-pwrrdy",
> > +	.unit = &pwrseq_rzg3l_dsi_pwrrdy_unit, };
> > +
> > +static const struct pwrseq_target_data pwrseq_rzg3l_csi_pwrrdy_target = {
> > +	.name = "csi-pwrrdy",
> > +	.unit = &pwrseq_rzg3l_csi_pwrrdy_unit, };
> > +
> > +static const struct pwrseq_target_data *pwrseq_rzg3l_pwrrdy_targets[] = {
> > +	&pwrseq_rzg3l_usb_pwrrdy_target,
> > +	&pwrseq_rzg3l_dsi_pwrrdy_target,
> > +	&pwrseq_rzg3l_csi_pwrrdy_target,
> > +	NULL
> > +};
> > +
> > +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
> > +				     struct device *dev)
> > +{
> > +	return PWRSEQ_MATCH_OK;
> 
> When I see an always-tru match() callback, it always raises an alarm bell.
> Typically, I'd expect there to be some validation of the consumer happening.
> 
> Please at least provide an explanation of why it's ok.

Without the match function the driver is not probing.

sysc(driver) ->powerseq(driver) ->{DSI,CSI,USB}(driver)
there is no property that I can match here as the resource is a register on
the SYSC IP and powerseq driver is instantiated by the SYSC driver.

Maybe I can provide a comment here saying that??
"No DT property to match here, so it is OK always"


> 
> > +}
> > +
> > +static int pwrseq_rzg3l_pwrrdy_probe(struct auxiliary_device *adev,
> > +				     const struct auxiliary_device_id *id) {
> > +	struct device *dev = &adev->dev;
> > +	struct pwrseq_config config = {};
> > +	struct pwrseq_device *pwrseq;
> > +	struct regmap *regmap;
> > +
> > +	regmap = dev_get_regmap(adev->dev.parent, NULL);
> > +	if (!regmap)
> > +		return dev_err_probe(dev, -ENODEV, "Failed to retrieve parent
> > +regmap\n");

I will remove this in next version as regmap can be passed from

devm_auxiliary_device_create() and

config.drvdata = adev->dev.platform_data;

> > +
> > +	config.parent = dev;
> > +	config.owner = THIS_MODULE;
> > +	config.drvdata = regmap;
> > +	config.match = pwrseq_rzg3l_pwrrdy_match;
> > +	config.targets = pwrseq_rzg3l_pwrrdy_targets;
> 
> Add newline here.

OK.

> 
> It wouldn't also hurt to use a compound literal like so:
> 
> 	config = (struct pwrseq_config){
> 		.parent = dev,
> 		...
> 	};
> 

Agreed.

> > +	pwrseq = devm_pwrseq_device_register(dev, &config);
> > +	if (IS_ERR(pwrseq))
> > +		return dev_err_probe(dev, PTR_ERR(pwrseq), "Failed to register
> > +power sequencer\n");
> > +
> 
> I'd just return devm_pwrseq_device_register() here.


OK.

Cheers,
Biju

Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Bartosz Golaszewski]

On Tue, 28 Jul 2026 11:17:58 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> Hi Bartosz Golaszewski,
>
> Thanks for the feedback.
>

...

>> > +
>> > +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
>> > +				     struct device *dev)
>> > +{
>> > +	return PWRSEQ_MATCH_OK;
>>
>> When I see an always-tru match() callback, it always raises an alarm bell.
>> Typically, I'd expect there to be some validation of the consumer happening.
>>
>> Please at least provide an explanation of why it's ok.
>
> Without the match function the driver is not probing.
>

Yes, that's expected.

> sysc(driver) ->powerseq(driver) ->{DSI,CSI,USB}(driver)
> there is no property that I can match here as the resource is a register on
> the SYSC IP and powerseq driver is instantiated by the SYSC driver.
>
> Maybe I can provide a comment here saying that??
> "No DT property to match here, so it is OK always"
>

So the sysc is the parent of the pwrseq provider and the CSI, DSI and USB
drivers are the consumers of the pwrseq descriptor? The latter are children
of the platform bus, am I getting this right? Can you point me to the device
tree that describes it?

Bart

RE: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Biju Das]

Hi Bartosz Golaszewski,

> -----Original Message-----
> From: Bartosz Golaszewski <brgl@kernel.org>
> Sent: 28 July 2026 12:35
> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver
> 
> On Tue, 28 Jul 2026 11:17:58 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> > Hi Bartosz Golaszewski,
> >
> > Thanks for the feedback.
> >
> 
> ...
> 
> >> > +
> >> > +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
> >> > +				     struct device *dev)
> >> > +{
> >> > +	return PWRSEQ_MATCH_OK;
> >>
> >> When I see an always-tru match() callback, it always raises an alarm bell.
> >> Typically, I'd expect there to be some validation of the consumer happening.
> >>
> >> Please at least provide an explanation of why it's ok.
> >
> > Without the match function the driver is not probing.
> >
> 
> Yes, that's expected.
> 
> > sysc(driver) ->powerseq(driver) ->{DSI,CSI,USB}(driver) there is no
> > property that I can match here as the resource is a register on the
> > SYSC IP and powerseq driver is instantiated by the SYSC driver.
> >
> > Maybe I can provide a comment here saying that??
> > "No DT property to match here, so it is OK always"
> >
> 
> So the sysc is the parent of the pwrseq provider and the CSI, DSI and USB drivers are the consumers of
> the pwrseq descriptor? The latter are children of the platform bus, am I getting this right? Can you
> point me to the device tree that describes it?

Yes,

Please see [1], [2], [3]

[1] sysc node

[2] phyrst node (I planned to remove renesas,sysc-pwrrdy in the next version as it is going to use pwrseq)

[3] dsi node (I planned to remove renesas,sysc-pwrrdy in the next version as it is going to use pwrseq)

[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/renesas/r9a08g046.dtsi?h=next-20260727#n609

[2] https://lore.kernel.org/all/TY3PR01MB11346FA21EFADC8A3D53D81BE86CF2@TY3PR01MB11346.jpnprd01.prod.outlook.com/T/#mf24ae1363925a97c840b275c108a9b72942c40bc

[3] https://lore.kernel.org/all/20260704093433.273672-1-biju.das.jz@bp.renesas.com/T/#m31c6711b5403c5a387b22467bb88371df73ae2b1


Cheers,
Biju

Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Bartosz Golaszewski]

On Tue, 28 Jul 2026 13:55:22 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> Hi Bartosz Golaszewski,
>
>> -----Original Message-----
>> From: Bartosz Golaszewski <brgl@kernel.org>
>> Sent: 28 July 2026 12:35
>> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver
>>
>> On Tue, 28 Jul 2026 11:17:58 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
>> > Hi Bartosz Golaszewski,
>> >
>> > Thanks for the feedback.
>> >
>>
>> ...
>>
>> >> > +
>> >> > +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
>> >> > +				     struct device *dev)
>> >> > +{
>> >> > +	return PWRSEQ_MATCH_OK;
>> >>
>> >> When I see an always-tru match() callback, it always raises an alarm bell.
>> >> Typically, I'd expect there to be some validation of the consumer happening.
>> >>
>> >> Please at least provide an explanation of why it's ok.
>> >
>> > Without the match function the driver is not probing.
>> >
>>
>> Yes, that's expected.
>>
>> > sysc(driver) ->powerseq(driver) ->{DSI,CSI,USB}(driver) there is no
>> > property that I can match here as the resource is a register on the
>> > SYSC IP and powerseq driver is instantiated by the SYSC driver.
>> >
>> > Maybe I can provide a comment here saying that??
>> > "No DT property to match here, so it is OK always"
>> >
>>
>> So the sysc is the parent of the pwrseq provider and the CSI, DSI and USB drivers are the consumers of
>> the pwrseq descriptor? The latter are children of the platform bus, am I getting this right? Can you
>> point me to the device tree that describes it?
>
> Yes,
>
> Please see [1], [2], [3]
>
> [1] sysc node
>
> [2] phyrst node (I planned to remove renesas,sysc-pwrrdy in the next version as it is going to use pwrseq)
>
> [3] dsi node (I planned to remove renesas,sysc-pwrrdy in the next version as it is going to use pwrseq)
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/renesas/r9a08g046.dtsi?h=next-20260727#n609
>
> [2] https://lore.kernel.org/all/TY3PR01MB11346FA21EFADC8A3D53D81BE86CF2@TY3PR01MB11346.jpnprd01.prod.outlook.com/T/#mf24ae1363925a97c840b275c108a9b72942c40bc
>
> [3] https://lore.kernel.org/all/20260704093433.273672-1-biju.das.jz@bp.renesas.com/T/#m31c6711b5403c5a387b22467bb88371df73ae2b1
>
>
> Cheers,
> Biju
>

Then it seems you have a phandle from the DSI node to the sysc node:

renesas,sysc-pwrrdy = <&sysc 0xd70 0x2>;

In match() you can check if that phandle leads to the sysc device who's the
parent of the power sequencer device and return MATCH_OK if it is.

Bart

RE: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Biju Das]

Hi Bartosz Golaszewski,

Thanks for the feedback.

> -----Original Message-----
> From: Bartosz Golaszewski <brgl@kernel.org>
> Sent: 28 July 2026 15:22
> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver
> 
> On Tue, 28 Jul 2026 13:55:22 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> > Hi Bartosz Golaszewski,
> >
> >> -----Original Message-----
> >> From: Bartosz Golaszewski <brgl@kernel.org>
> >> Sent: 28 July 2026 12:35
> >> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power
> >> Ready driver
> >>
> >> On Tue, 28 Jul 2026 11:17:58 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> >> > Hi Bartosz Golaszewski,
> >> >
> >> > Thanks for the feedback.
> >> >
> >>
> >> ...
> >>
> >> >> > +
> >> >> > +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
> >> >> > +				     struct device *dev)
> >> >> > +{
> >> >> > +	return PWRSEQ_MATCH_OK;
> >> >>
> >> >> When I see an always-tru match() callback, it always raises an alarm bell.
> >> >> Typically, I'd expect there to be some validation of the consumer happening.
> >> >>
> >> >> Please at least provide an explanation of why it's ok.
> >> >
> >> > Without the match function the driver is not probing.
> >> >
> >>
> >> Yes, that's expected.
> >>
> >> > sysc(driver) ->powerseq(driver) ->{DSI,CSI,USB}(driver) there is no
> >> > property that I can match here as the resource is a register on the
> >> > SYSC IP and powerseq driver is instantiated by the SYSC driver.
> >> >
> >> > Maybe I can provide a comment here saying that??
> >> > "No DT property to match here, so it is OK always"
> >> >
> >>
> >> So the sysc is the parent of the pwrseq provider and the CSI, DSI and
> >> USB drivers are the consumers of the pwrseq descriptor? The latter
> >> are children of the platform bus, am I getting this right? Can you point me to the device tree that
> describes it?
> >
> > Yes,
> >
> > Please see [1], [2], [3]
> >
> > [1] sysc node
> >
> > [2] phyrst node (I planned to remove renesas,sysc-pwrrdy in the next
> > version as it is going to use pwrseq)
> >
> > [3] dsi node (I planned to remove renesas,sysc-pwrrdy in the next
> > version as it is going to use pwrseq)
> >
> > [1]
> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tr
> > ee/arch/arm64/boot/dts/renesas/r9a08g046.dtsi?h=next-20260727#n609
> >
> > [2]
> > https://lore.kernel.org/all/TY3PR01MB11346FA21EFADC8A3D53D81BE86CF2@TY
> > 3PR01MB11346.jpnprd01.prod.outlook.com/T/#mf24ae1363925a97c840b275c108
> > a9b72942c40bc
> >
> > [3]
> > https://lore.kernel.org/all/20260704093433.273672-1-biju.das.jz@bp.ren
> > esas.com/T/#m31c6711b5403c5a387b22467bb88371df73ae2b1
> >
> >
> > Cheers,
> > Biju
> >
> 
> Then it seems you have a phandle from the DSI node to the sysc node:
> 
> renesas,sysc-pwrrdy = <&sysc 0xd70 0x2>;

But this is no more required after modelling the pwrrdy signal as powerseq driver.

> 
> In match() you can check if that phandle leads to the sysc device who's the parent of the power sequencer
> device and return MATCH_OK if it is.

As per the DT maintainer Krzysztof Kozlowski, we should not use random phandles for pwrrdy signal.

Also, I confirm that this property is unnecessary if we model it as Power sequencer.

From ABI, point now only matters is the pwrseq_target_data.name in the power sequence driver and
consumers.

dsi->pwrseq = devm_pwrseq_get(dsi->dev, "dsi-pwrrdy");
priv->pwrseq = devm_pwrseq_get(dev, "usb-pwrrdy");

From the experience, I don't think, DT maintainers will allow
to define a vendor property just for the driver match.

Cheers,
Biju

Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Bartosz Golaszewski]

On Tue, 28 Jul 2026 16:38:00 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> Hi Bartosz Golaszewski,
>
> Thanks for the feedback.
>
>> -----Original Message-----
>> From: Bartosz Golaszewski <brgl@kernel.org>
>> Sent: 28 July 2026 15:22
>> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver
>>
>> On Tue, 28 Jul 2026 13:55:22 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
>> > Hi Bartosz Golaszewski,
>> >
>> >> -----Original Message-----
>> >> From: Bartosz Golaszewski <brgl@kernel.org>
>> >> Sent: 28 July 2026 12:35
>> >> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power
>> >> Ready driver
>> >>
>> >> On Tue, 28 Jul 2026 11:17:58 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
>> >> > Hi Bartosz Golaszewski,
>> >> >
>> >> > Thanks for the feedback.
>> >> >
>> >>
>> >> ...
>> >>
>> >> >> > +
>> >> >> > +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
>> >> >> > +				     struct device *dev)
>> >> >> > +{
>> >> >> > +	return PWRSEQ_MATCH_OK;
>> >> >>
>> >> >> When I see an always-tru match() callback, it always raises an alarm bell.
>> >> >> Typically, I'd expect there to be some validation of the consumer happening.
>> >> >>
>> >> >> Please at least provide an explanation of why it's ok.
>> >> >
>> >> > Without the match function the driver is not probing.
>> >> >
>> >>
>> >> Yes, that's expected.
>> >>
>> >> > sysc(driver) ->powerseq(driver) ->{DSI,CSI,USB}(driver) there is no
>> >> > property that I can match here as the resource is a register on the
>> >> > SYSC IP and powerseq driver is instantiated by the SYSC driver.
>> >> >
>> >> > Maybe I can provide a comment here saying that??
>> >> > "No DT property to match here, so it is OK always"
>> >> >
>> >>
>> >> So the sysc is the parent of the pwrseq provider and the CSI, DSI and
>> >> USB drivers are the consumers of the pwrseq descriptor? The latter
>> >> are children of the platform bus, am I getting this right? Can you point me to the device tree that
>> describes it?
>> >
>> > Yes,
>> >
>> > Please see [1], [2], [3]
>> >
>> > [1] sysc node
>> >
>> > [2] phyrst node (I planned to remove renesas,sysc-pwrrdy in the next
>> > version as it is going to use pwrseq)
>> >
>> > [3] dsi node (I planned to remove renesas,sysc-pwrrdy in the next
>> > version as it is going to use pwrseq)
>> >
>> > [1]
>> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tr
>> > ee/arch/arm64/boot/dts/renesas/r9a08g046.dtsi?h=next-20260727#n609
>> >
>> > [2]
>> > https://lore.kernel.org/all/TY3PR01MB11346FA21EFADC8A3D53D81BE86CF2@TY
>> > 3PR01MB11346.jpnprd01.prod.outlook.com/T/#mf24ae1363925a97c840b275c108
>> > a9b72942c40bc
>> >
>> > [3]
>> > https://lore.kernel.org/all/20260704093433.273672-1-biju.das.jz@bp.ren
>> > esas.com/T/#m31c6711b5403c5a387b22467bb88371df73ae2b1
>> >
>> >
>> > Cheers,
>> > Biju
>> >
>>

Please wrap your emails at 80 characters as per the mailing list etiquette.

>> Then it seems you have a phandle from the DSI node to the sysc node:
>>
>> renesas,sysc-pwrrdy = <&sysc 0xd70 0x2>;
>
> But this is no more required after modelling the pwrrdy signal as powerseq driver.
>

So can you show me what the actual DT nodes and connections look like?

>>
>> In match() you can check if that phandle leads to the sysc device who's the parent of the power sequencer
>> device and return MATCH_OK if it is.
>
> As per the DT maintainer Krzysztof Kozlowski, we should not use random phandles for pwrrdy signal.
>
> Also, I confirm that this property is unnecessary if we model it as Power sequencer.
>
> From ABI, point now only matters is the pwrseq_target_data.name in the power sequence driver and
> consumers.
>
> dsi->pwrseq = devm_pwrseq_get(dsi->dev, "dsi-pwrrdy");
> priv->pwrseq = devm_pwrseq_get(dev, "usb-pwrrdy");
>
> From the experience, I don't think, DT maintainers will allow
> to define a vendor property just for the driver match.
>

You pointed me to the node so I assumed this is what it will look like. I don't
have the full context in my head.

I still prefer there to be some connection and validation of the pwrseq
consumer so I'm inquiring about the architecture.

Please respond with the relevant DT nodes' final form.

Bart

RE: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Biju Das]

Hi Bartosz Golaszewski,

> -----Original Message-----
> From: Bartosz Golaszewski <brgl@kernel.org>
> Sent: 29 July 2026 14:09
> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver
> 
> On Tue, 28 Jul 2026 16:38:00 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> > Hi Bartosz Golaszewski,
> >
> > Thanks for the feedback.
> >
> >> -----Original Message-----
> >> From: Bartosz Golaszewski <brgl@kernel.org>
> >> Sent: 28 July 2026 15:22
> >> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power
> >> Ready driver
> >>
> >> On Tue, 28 Jul 2026 13:55:22 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> >> > Hi Bartosz Golaszewski,
> >> >
> >> >> -----Original Message-----
> >> >> From: Bartosz Golaszewski <brgl@kernel.org>
> >> >> Sent: 28 July 2026 12:35
> >> >> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L
> >> >> Power Ready driver
> >> >>
> >> >> On Tue, 28 Jul 2026 11:17:58 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> >> >> > Hi Bartosz Golaszewski,
> >> >> >
> >> >> > Thanks for the feedback.
> >> >> >
> >> >>
> >> >> ...
> >> >>
> >> >> >> > +
> >> >> >> > +static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
> >> >> >> > +				     struct device *dev) {
> >> >> >> > +	return PWRSEQ_MATCH_OK;
> >> >> >>
> >> >> >> When I see an always-tru match() callback, it always raises an alarm bell.
> >> >> >> Typically, I'd expect there to be some validation of the consumer happening.
> >> >> >>
> >> >> >> Please at least provide an explanation of why it's ok.
> >> >> >
> >> >> > Without the match function the driver is not probing.
> >> >> >
> >> >>
> >> >> Yes, that's expected.
> >> >>
> >> >> > sysc(driver) ->powerseq(driver) ->{DSI,CSI,USB}(driver) there is
> >> >> > no property that I can match here as the resource is a register
> >> >> > on the SYSC IP and powerseq driver is instantiated by the SYSC driver.
> >> >> >
> >> >> > Maybe I can provide a comment here saying that??
> >> >> > "No DT property to match here, so it is OK always"
> >> >> >
> >> >>
> >> >> So the sysc is the parent of the pwrseq provider and the CSI, DSI
> >> >> and USB drivers are the consumers of the pwrseq descriptor? The
> >> >> latter are children of the platform bus, am I getting this right?
> >> >> Can you point me to the device tree that
> >> describes it?
> >> >
> >> > Yes,
> >> >
> >> > Please see [1], [2], [3]
> >> >
> >> > [1] sysc node
> >> >
> >> > [2] phyrst node (I planned to remove renesas,sysc-pwrrdy in the
> >> > next version as it is going to use pwrseq)
> >> >
> >> > [3] dsi node (I planned to remove renesas,sysc-pwrrdy in the next
> >> > version as it is going to use pwrseq)
> >> >
> >> > [1]
> >> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
> >> > /tr
> >> > ee/arch/arm64/boot/dts/renesas/r9a08g046.dtsi?h=next-20260727#n609
> >> >
> >> > [2]
> >> > https://lore.kernel.org/all/TY3PR01MB11346FA21EFADC8A3D53D81BE86CF2
> >> > @TY
> >> > 3PR01MB11346.jpnprd01.prod.outlook.com/T/#mf24ae1363925a97c840b275c
> >> > 108
> >> > a9b72942c40bc
> >> >
> >> > [3]
> >> > https://lore.kernel.org/all/20260704093433.273672-1-biju.das.jz@bp.
> >> > ren
> >> > esas.com/T/#m31c6711b5403c5a387b22467bb88371df73ae2b1
> >> >
> >> >
> >> > Cheers,
> >> > Biju
> >> >
> >>
> 
> Please wrap your emails at 80 characters as per the mailing list etiquette.

OK.

> 
> >> Then it seems you have a phandle from the DSI node to the sysc node:
> >>
> >> renesas,sysc-pwrrdy = <&sysc 0xd70 0x2>;
> >
> > But this is no more required after modelling the pwrrdy signal as powerseq driver.
> >
> 
> So can you show me what the actual DT nodes and connections look like?
> 
> >>
> >> In match() you can check if that phandle leads to the sysc device
> >> who's the parent of the power sequencer device and return MATCH_OK if it is.
> >
> > As per the DT maintainer Krzysztof Kozlowski, we should not use random phandles for pwrrdy signal.
> >
> > Also, I confirm that this property is unnecessary if we model it as Power sequencer.
> >
> > From ABI, point now only matters is the pwrseq_target_data.name in the
> > power sequence driver and consumers.
> >
> > dsi->pwrseq = devm_pwrseq_get(dsi->dev, "dsi-pwrrdy");
> > priv->pwrseq = devm_pwrseq_get(dev, "usb-pwrrdy");
> >
> > From the experience, I don't think, DT maintainers will allow to
> > define a vendor property just for the driver match.
> >
> 
> You pointed me to the node so I assumed this is what it will look like. I don't have the full context in
> my head.

My bad. Sorry for that, Today I have posted power sequence consumer drivers with DT.

> I still prefer there to be some connection and validation of the pwrseq consumer so I'm inquiring about
> the architecture.

OK.

> 
> Please respond with the relevant DT nodes' final form.

Here it is. Please find the relevant DT nodes usbphy-ctrl [1] and dsi [2]

[1] https://lore.kernel.org/all/20260729115022.222340-9-biju.das.jz@bp.renesas.com/
[2] https://lore.kernel.org/all/20260729125516.230757-14-biju.das.jz@bp.renesas.com/

Cheers,
Biju

Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Bartosz Golaszewski]

On Wed, 29 Jul 2026 16:33:31 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
>
> Here it is. Please find the relevant DT nodes usbphy-ctrl [1] and dsi [2]
>
> [1] https://lore.kernel.org/all/20260729115022.222340-9-biju.das.jz@bp.renesas.com/
> [2] https://lore.kernel.org/all/20260729125516.230757-14-biju.das.jz@bp.renesas.com/
>

So the sysc is the parent of the power sequencer but there's no relation
between it and the consumers modeled in DT?

In that case some validation is still required: you should make sure the
consumer device is compatible with a list of devices we can service. sysc and
consumers also seem to share the parent node so that's worth checking too.

We shouldn't just return MATCH_OK for anyone that comes knocking.

Bart

RE: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver

[Biju Das]

Hi Bartosz Golaszewski,

> -----Original Message-----
> From: Bartosz Golaszewski <brgl@kernel.org>
> Sent: 30 July 2026 09:52
> Subject: Re: [PATCH 2/3] power: sequencing: Add Renesas RZ/G3L Power Ready driver
> 
> On Wed, 29 Jul 2026 16:33:31 +0200, Biju Das <biju.das.jz@bp.renesas.com> said:
> >
> > Here it is. Please find the relevant DT nodes usbphy-ctrl [1] and dsi
> > [2]
> >
> > [1]
> > https://lore.kernel.org/all/20260729115022.222340-9-biju.das.jz@bp.ren
> > esas.com/ [2]
> > https://lore.kernel.org/all/20260729125516.230757-14-biju.das.jz@bp.re
> > nesas.com/
> >
> 
> So the sysc is the parent of the power sequencer but there's no relation between it and the consumers
> modeled in DT?
> 
> In that case some validation is still required: you should make sure the consumer device is compatible
> with a list of devices we can service. sysc and consumers also seem to share the parent node so that's
> worth checking too.
> 
> We shouldn't just return MATCH_OK for anyone that comes knocking.

OK, will add below matching in V3:

+static int pwrseq_rzg3l_pwrrdy_match(struct pwrseq_device *pwrseq,
+				     struct device *dev)
+{
+	static const struct of_device_id pwrseq_rzg3l_consumer_match[] = {
+		{ .compatible = "renesas,r9a08g046-mipi-dsi" },
+		{ .compatible = "renesas,r9a08g046-usbphy-ctrl" },
+		{ /* sentinel */ }
+	};
+	const struct of_device_id *match;
+
+	match = of_match_device(pwrseq_rzg3l_consumer_match, dev);
+	if (!match)
+		return PWRSEQ_NO_MATCH;
+
+	return PWRSEQ_MATCH_OK;
+}

Cheers,
Biju

[PATCH 3/3] soc: renesas: Kconfig: Select POWER_SEQUENCING_RENESAS_PWRRDY for R9A08G046

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

The RZ/G3L SYSC driver registers a "pwrseq-pwrrdy" auxiliary device to
handle the PWRRDY power sequencing, which requires the
pwrseq-renesas-pwrrdy driver to bind to it. Select
POWER_SEQUENCING_RENESAS_PWRRDY from SYSC_R9A08G046 so it's built
whenever RZ/G3L SYSC support is enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/soc/renesas/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index fdf18ed2dfc2..86baa5bdbab9 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -493,6 +493,7 @@ config SYSC_R9A08G045
 config SYSC_R9A08G046
 	bool "Renesas System controller support for R9A08G046 (RZ/G3L)" if COMPILE_TEST
 	select SYSC_RZ
+	select POWER_SEQUENCING_RENESAS_PWRRDY
 
 config SYS_R9A09G047
 	bool "Renesas System controller support for R9A09G047 (RZ/G3E)" if COMPILE_TEST
-- 
2.43.0

RE: [PATCH 0/3] soc: renesas: rz-sysc: Add RZ/G3L PWRRDY power sequencing support

[Biju Das]

Hi All,

> -----Original Message-----
> From: Biju <biju.das.au@gmail.com>
> Sent: 25 July 2026 13:34
> Subject: [PATCH 0/3] soc: renesas: rz-sysc: Add RZ/G3L PWRRDY power sequencing support
> 
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> Hi all,
> 
> Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that signals power readiness for various IPs (USB, DSI,
> CSI, etc.) to their respective controllers. This register is part of the SYSC IP. Add a dedicated power
> sequencing driver to handle these signals.
> 
> This series adds that support:
> 
> - Patch 1 adds a pwrrdy_pwrseq flag to struct rz_sysc_soc_id_init_data,
>   sets it for RZ/G3L, and has the SYSC driver register a
>   "pwrseq-pwrrdy" auxiliary device when the flag is set, so a
>   dedicated driver can bind to it and handle the sequencing.
> 
> - Patch 2 adds that dedicated driver, pwrseq-renesas-pwrrdy, which
>   binds to the auxiliary device exposed by patch 1 and exposes
>   usb-pwrrdy, dsi-pwrrdy, and csi-pwrrdy pwrseq targets, toggling the
>   appropriate bits in the SYS_PWRRDY_N register via the parent SYSC
>   driver's regmap.
> 
> - Patch 3 selects POWER_SEQUENCING_RENESAS_PWRRDY from
>   SYSC_R9A08G046 so the new driver is built whenever RZ/G3L SYSC
>   support is enabled.
> 
> This series is based on proposal for power sequence driver [1] for USB PWRRDY signal and DSI PWRRDY
> signal[2].
> 
> I will send USB/DSI/CSI driver patches based on this series soon.
> 
>  [1] https://lore.kernel.org/all/CAPDyKFpLnREr4C=wZ7o8Lb-CZbQa4Nr2VTuYdZHZ26Rcb1Masg@mail.gmail.com/

Please find the link for original proposal for power sequence driver

https://lore.kernel.org/all/c7fc31f1247332196516394a22f6feef9733a0b4.camel@pengutronix.de/#t

Cheers,
Biju