From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
<linux-arm-msm@vger.kernel.org>, <andersson@kernel.org>,
<agross@kernel.org>
Cc: <patches@linaro.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
"Dmitry Baryshkov" <dmitry.baryshkov@linaro.org>,
Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Kalyan Thota <quic_kalyant@quicinc.com>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@somainline.org>,
Loic Poulain <loic.poulain@linaro.org>,
<dri-devel@lists.freedesktop.org>,
<freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] drm/msm/dpu1: Remove INTF4 IRQ from SDM845 IRQ mask
Date: Wed, 16 Nov 2022 03:37:25 -0800 [thread overview]
Message-ID: <4f872825-e646-8a8c-dbd0-112328b9b5f2@quicinc.com> (raw)
In-Reply-To: <20221107103739.8993-1-konrad.dybcio@linaro.org>
On 11/7/2022 2:37 AM, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@somainline.org>
>
> SDM845 only has INTF0-3 and has no business caring about the INTF4 irq.
>
> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
It is true that SDM845 doesnt have INTF4. I was a bit concerned whether
this would impact SM8150 as that re-uses the IRQ_SDM845_MASK but even
SM8150 doesnt have INTF4.
A minor nit, the subject convention in this file seems to be drm/msm/dpu
and not drm/msm/dpu1.
Other than that,
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 27f029fdc682..06897a497eb7 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -86,7 +86,6 @@
> BIT(MDP_INTF1_INTR) | \
> BIT(MDP_INTF2_INTR) | \
> BIT(MDP_INTF3_INTR) | \
> - BIT(MDP_INTF4_INTR) | \
> BIT(MDP_AD4_0_INTR) | \
> BIT(MDP_AD4_1_INTR))
>
next prev parent reply other threads:[~2022-11-16 11:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-07 10:37 Konrad Dybcio
2022-11-16 11:37 ` Abhinav Kumar [this message]
2023-01-09 22:41 ` Dmitry Baryshkov
2023-01-09 23:43 ` Dmitry Baryshkov
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