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From: David Laight <David.Laight@ACULAB.COM>
To: "'H. Peter Anvin'" <hpa@zytor.com>,
	'Thorsten Blum' <thorsten.blum@toblux.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"x86@kernel.org" <x86@kernel.org>
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>,
	Wei Liu <wei.liu@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] x86/apic: Use div64_ul() instead of do_div()
Date: Fri, 1 Mar 2024 08:53:03 +0000	[thread overview]
Message-ID: <500833b5660949c8b52b756f1c2acc0e@AcuMS.aculab.com> (raw)
In-Reply-To: <96394DFF-43D7-4877-AA47-FC847FD26184@zytor.com>

From: H. Peter Anvin
> Sent: 01 March 2024 01:02
> 
> >>
> >> Change deltapm to unsigned long and replace do_div() with div64_ul()
> >> which doesn't implicitly cast the divisor and doesn't unnecessarily
> >> calculate the remainder.
> >
> >Eh? they are entirely different beasts.
> >
> >do_div() does a 64 by 32 divide that gives a 32bit quotient.
> >div64_ul() does a much more expensive 64 by 64 divide that
> >can generate a 64bit quotient.
> >
> >The remainder is pretty much free in both cases.
> >If a cpu has a divide instruction it will almost certainly
> >put the result in one register and the quotient in another.
> >
> 
> Not on e.g. RISC-V.

If the remainder isn't used the compiler should optimise
away any code used to generate it.

gcc is also generating rather sub-optimal code.
On x86 it only does one divide for code that uses 'a / b' and
'a % b', but for riscv it does separate divide and remainder
instructions.
clang does a multiply and subtract for the remainder.

Compared to any form of divide, the extra multiply is noise.

gcc also pessimises attempts to calculate the remainder:
https://godbolt.org/z/Tojh1qcvs

Are the instruction weights set correctly for divide/remainder?
It is almost as though gcc thinks remainder is fast.

Actually I suspect even the 64 by 32 divide is a software loop
on riscv (32bit).
Not checked but I suspect the implementations (esp fpga ones) won't
allow 3 inputs to the ALU.

	David

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Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)

  reply	other threads:[~2024-03-01  8:53 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-27 11:43 Thorsten Blum
2024-02-29 22:13 ` David Laight
2024-03-01  1:01   ` H. Peter Anvin
2024-03-01  8:53     ` David Laight [this message]
2024-03-01 12:28   ` Thorsten Blum
2024-03-01 20:39     ` [PATCH v2] x86/apic: Use u32 instead of unsigned long Thorsten Blum
2024-03-08 12:43       ` [RESEND PATCH " Thorsten Blum
2024-03-08 16:12         ` Dave Hansen
2024-03-08 19:50           ` Thorsten Blum
2024-03-08 23:02             ` [PATCH v3] x86/apic: Improve data types to fix Coccinelle warnings Thorsten Blum
2024-03-18 10:47               ` [RESEND PATCH " Thorsten Blum
2024-03-18 16:13                 ` Dave Hansen

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