From: Usama Arif <usama.arif@linux.dev>
To: David Laight <david.laight.linux@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
Kiryl Shutsemau <kas@kernel.org>,
bp@alien8.de, dave.hansen@linux.intel.com, dsterba@suse.com,
hpa@zytor.com, linux-kernel@vger.kernel.org, mingo@redhat.com,
terrelln@fb.com, tglx@kernel.org, x86@kernel.org,
hannes@cmpxchg.org, riel@surriel.com, shakeel.butt@linux.dev,
kernel-team@meta.com
Subject: Re: [PATCH] x86/lib: Use REP MOVSB for large memcpy() on ERMS CPUs without FSRM
Date: Tue, 3 Nov 2026 22:44:34 +0000 [thread overview]
Message-ID: <5027b93f-e6a8-4324-b96c-5ed6f941ca99@linux.dev> (raw)
In-Reply-To: <20261103221325.789ff51a@pumpkin>
[...]
>>>> diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S
>>>> index 12a23fa7c44c5..407b226d4de2f 100644
>>>> --- a/arch/x86/lib/memcpy_64.S
>>>> +++ b/arch/x86/lib/memcpy_64.S
>>>> @@ -31,24 +31,27 @@
>>>> * which the compiler could/should do much better anyway.
>>>> */
>>>> SYM_TYPED_FUNC_START(__memcpy)
>>>> - ALTERNATIVE "jmp memcpy_orig", "", X86_FEATURE_FSRM
>>>> -
>>>> movq %rdi, %rax
>>>> movq %rdx, %rcx
>>>> - rep movsb
>>>> - RET
>>>> -SYM_FUNC_END(__memcpy)
>>>> -EXPORT_SYMBOL(__memcpy)
>>>> -
>>>> -SYM_FUNC_ALIAS_MEMFUNC(memcpy, __memcpy)
>>>> -SYM_PIC_ALIAS(memcpy)
>>>> -EXPORT_SYMBOL(memcpy)
>>>>
>>>> -SYM_FUNC_START_LOCAL(memcpy_orig)
>>>> - movq %rdi, %rax
>>>> +#ifdef CONFIG_MITIGATION_ITS
>>>> + /*
>>>> + * Returns are patched before alternatives. Keep the replacement
>>>> + * return in the first half of a cache line so ITS retains its thunk
>>>> + * when the instruction is copied to its final address.
>>>
>>> I'm not 100% sure what that is about, but does it mean that the cache line
>>> alignment of the code here also matters?
>>
>> Not the alignment of __memcpy() itself, only that of the replacement in
>> .altinstr_replacement.
>>
>> On ITS affected CPUs, a RET in the lower 32 bytes of a 64-byte cache
>> line needs mitigation, so apply_returns() leaves such sites as a jump to
>> its_return_thunk, whose own RET is in the upper half, and turns the rest
>> into a plain RET. It runs before apply_alternatives(), so for the RET in
>> the FSRM replacement it decides from the replacement's address, not from
>> where the code is copied to. A plain RET could then end up in the lower
>> half of a line in __memcpy().
>
> So the RET in the replacement is in the first half a cache line- so becomes a ret.
> But, unless __memcpy() is aligned, the relocated RET might be in the second
> half so would need mitigating - but you copy in a mitigation-free ret.
It's the other way round: a RET in the first half keeps the jump to
its_return_thunk, see cpu_wants_rethunk_at():
return !((unsigned long)addr & 0x20);
So the copy is the thunk jump, which is safe in either half.
>
> If that is the only mitigation then wouldn't aligning memcpy mean you could
> just use a ret (possibly followed by an 'int 3' - or whatever is the 'flavour
> of the month' instruction for stopping SLS).
It isn't the only one: with the retbleed, SRSO or call depth tracking
thunk every return needs it, so the code has to use RET and let
apply_returns() pick. For ITS alone, aligning __memcpy() would save one
direct jump on FSRM CPUs with ITS (Ice Lake to Rocket Lake), which I
don't think is worth it.
[...]
next prev parent reply other threads:[~2026-11-03 22:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-13 10:04 Usama Arif
2026-10-15 10:39 ` Kiryl Shutsemau
2026-10-17 19:27 ` Usama Arif
2026-10-21 9:54 ` Kiryl Shutsemau
2026-10-21 18:18 ` Linus Torvalds
2026-10-22 8:49 ` David Laight
2026-11-02 23:03 ` Usama Arif
2026-11-03 8:32 ` David Laight
2026-11-03 14:14 ` Usama Arif
2026-11-03 22:13 ` David Laight
2026-11-03 22:44 ` Usama Arif [this message]
2026-10-17 21:42 ` David Laight
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