From: Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: bod@kernel.org, vkoul@kernel.org, kishon@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
neil.armstrong@linaro.org, mani@kernel.org,
gjorgji.rosikopulos@oss.qualcomm.com,
hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com,
jigarkumar.zala@oss.qualcomm.com, loic.poulain@oss.qualcomm.com,
vladimir.zapolskiy@linaro.org, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/7] dt-bindings: phy: qcom: Add qcom,sa8775p-csi2-phy schema
Date: Tue, 20 Oct 2026 13:59:13 -0700 [thread overview]
Message-ID: <51147489-a26b-480c-9d33-a09eb858fbb7@oss.qualcomm.com> (raw)
In-Reply-To: <20261019-ninja-velociraptor-of-gallantry-2efa3c@quoll>
Hi Krzysztof,
Thank you for the comments. I have replied to Bryan's comment about a
single generic yaml file. Based on his comments, I will drop the next
version of this patchset with these comments addressed.
Best Regards,
Anusha
On 10/19/2026 12:16 AM, Krzysztof Kozlowski wrote:
> On Fri, Oct 16, 2026 at 04:54:57PM -0700, Anusha Arun Nandi wrote:
>> Add a device-tree binding for the Qualcomm SA8775P MIPI CSI2
>> PHY, modelled as a standalone generic-PHY provider like the existing
>> qcom,x1e80100-csi2-phy, so CAMSS can consume the CSIPHY through the
>> common PHY framework instead of driving it in-line.
>
> A nit, subject: drop second/last, redundant "schema". The
> "dt-bindings" prefix is already stating that these are schemas.
> See also:
> https://elixir.bootlin.com/linux/v7.1-rc7/source/Documentation/devicetree/bindings/submitting-patches.rst#L23
>
>>
>> Follows the qcom,x1e80100-csi2-phy schema's shape: a ports/port@0
>> sensor-input endpoint carrying data-lanes/bus-type (D-PHY only for
>> now, C-PHY bus-type value is accepted by the schema but wired up by a
>> companion series), a port@1 CSID output, and a mandatory
>> operating-points-v2 table plus power-domains/power-domain-names.
>>
>> Unlike x1e80100, SA8775P's CSIPHY has a single power-domain: the
>> Titan Top GDSC, matching the legacy in-tree CAMSS driver's
>> sa8775p_resources.pd_name = "top" (drivers/media/platform/qcom/camss/
>> camss.c) and the existing lemans.dtsi camss node's power-domains =
>> <&camcc CAM_CC_TITAN_TOP_GDSC>. It is not OPP-scaled, only kept
>> enabled, the same way x1e80100's own "top" domain is.
>>
>> The PHY takes three clocks (core, timer and the shared CSID CSIPHY RX
>> clock) and the vdda-phy/vdda-pll supplies. The core/timer naming
>> matches x1e80100's clock-names convention for the same pair of
>> clocks.
>>
>> Signed-off-by: Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>
>> ---
>> .../bindings/phy/qcom,sa8775p-csi2-phy.yaml | 172 ++++++++++++++++++
>> 1 file changed, 172 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml
>> new file mode 100644
>> index 000000000000..b66ec2f14189
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml
>> @@ -0,0 +1,172 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +# Copyright (c) 2026 Qualcomm Innovation Center, Inc. All rights reserved.
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/phy/qcom,sa8775p-csi2-phy.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm SA8775P CSI2 PHY
>> +
>> +maintainers:
>> + - Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>
>> +
>> +description:
>> + Qualcomm MIPI CSI2 D-PHY. Connects MIPI CSI2 sensors to Qualcomm's Camera
>> + CSI Decoder on the SA8775P SoC.
>> +
>> +properties:
>> + compatible:
>> + const: qcom,sa8775p-csi2-phy
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clocks:
>> + maxItems: 3
>> +
>> + clock-names:
>> + items:
>> + - const: core
>> + - const: timer
>> + - const: csiphy_rx
>
> You just named it basde on clock name. Instead, name it based on the
> input name. csiphy is also completely redundant.
>
>> +
>> + interrupts:
>> + maxItems: 1
>> +
>> + operating-points-v2: true
>> +
>> + opp-table:
>> + type: object
>> +
>> + power-domains:
>> + items:
>> + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller.
>> +
>> + power-domain-names:
>> + items:
>> + - const: top
>> +
>> + vdda-phy-supply:
>> + description: Phandle to PHY supply.
>> +
>> + vdda-pll-supply:
>> + description: Phandle to PLL supply.
>> +
>> + ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>> +
>> + properties:
>> + port@0:
>> + $ref: /schemas/graph.yaml#/$defs/port-base
>> + description:
>> + Sensor input. A single sensor is described by a single endpoint
>> + with one to four data lanes, numbered 1-4. The clock lane is
>> + position 0.
>> +
>> + unevaluatedProperties: false
>> +
>> + patternProperties:
>> + "^endpoint(@0)?$":
>
> so not a pattern really and just endpoint.
>
>> + $ref: /schemas/media/video-interfaces.yaml#
>> + unevaluatedProperties: false
>> + properties:
>> + bus-type:
>> + enum:
>> + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
>> + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
>> + default: 4
>> +
>> + data-lanes:
>> + minItems: 1
>> + maxItems: 4
>> + items:
>> + minimum: 1
>> + maximum: 4
>> + description:
>> + Data lane positions following this endpoint's clock
>> + lane. Positions are a per-port logical numbering, not
>> + package pad or ball positions.
>> +
>> + required:
>> + - data-lanes
>> + - remote-endpoint
>> +
>> + port@1:
>> + $ref: /schemas/graph.yaml#/properties/port
>> + description: Output to the CAMSS CSID controller.
>> +
>> + required:
>> + - port@0
>> + - port@1
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - clocks
>> + - clock-names
>> + - interrupts
>> + - operating-points-v2
>> + - power-domains
>> + - power-domain-names
>> + - vdda-phy-supply
>> + - vdda-pll-supply
>> + - ports
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/qcom,sa8775p-camcc.h>
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/media/video-interfaces.h>
>> +
>> + csiphy0: csiphy@ac9c000 {
>
> Drop unused label
>
> git grep csiphy@
>
> Don't come with own style.
>
> Best regards,
> Krzysztof
next prev parent reply other threads:[~2026-10-20 20:59 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 23:54 [PATCH 0/7] phy: qcom-mipi-csi2: Add D-PHY support for sa8775p, qcs8300 and sc7280 Anusha Arun Nandi
2026-10-16 23:54 ` [PATCH 1/7] phy: qcom-mipi-csi2: fix -EEXIST probe failure on single power-domain SoCs Anusha Arun Nandi
2026-10-19 9:55 ` Bryan O'Donoghue
2026-10-20 2:33 ` Anusha Arun Nandi
2026-10-16 23:54 ` [PATCH 2/7] dt-bindings: phy: qcom: Add qcom,sa8775p-csi2-phy schema Anusha Arun Nandi
2026-10-17 17:48 ` Nihal Kumar Gupta
2026-10-19 7:13 ` Krzysztof Kozlowski
2026-10-19 7:25 ` Nihal Kumar Gupta
2026-10-20 5:54 ` Krzysztof Kozlowski
2026-10-19 7:16 ` Krzysztof Kozlowski
2026-10-20 20:59 ` Anusha Arun Nandi [this message]
2026-10-19 8:29 ` Bryan O'Donoghue
2026-10-20 20:47 ` Anusha Arun Nandi
2026-10-16 23:54 ` [PATCH 3/7] dt-bindings: phy: qcom: Add qcs8300 to the CSI2 PHY schema Anusha Arun Nandi
2026-10-19 7:18 ` Krzysztof Kozlowski
2026-10-20 21:04 ` Anusha Arun Nandi
2026-10-16 23:54 ` [PATCH 4/7] phy: qcom-mipi-csi2: Add sa8775p D-PHY support Anusha Arun Nandi
2026-10-19 10:01 ` Bryan O'Donoghue
2026-10-16 23:55 ` [PATCH 5/7] phy: qcom-mipi-csi2: Add qcs8300 CSI2 PHY support Anusha Arun Nandi
2026-10-19 7:18 ` Krzysztof Kozlowski
2026-10-20 21:15 ` Anusha Arun Nandi
2026-10-16 23:55 ` [PATCH 6/7] dt-bindings: phy: qcom: Add qcom,sc7280-csi2-phy schema Anusha Arun Nandi
2026-10-19 7:19 ` Krzysztof Kozlowski
2026-10-16 23:55 ` [PATCH 7/7] phy: qcom-mipi-csi2: Add sc7280 D-PHY provider Anusha Arun Nandi
2026-10-17 17:50 ` [PATCH 0/7] phy: qcom-mipi-csi2: Add D-PHY support for sa8775p, qcs8300 and sc7280 Nihal Kumar Gupta
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