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From: "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: linux-kernel@vger.kernel.org, Borislav Petkov <bp@alien8.de>,
	Chen Gong <gong.chen@linux.intel.com>
Subject: Re: [PATCH] x86/mce: Update MCE severity condition check
Date: Thu, 27 Jun 2013 14:25:31 +0530	[thread overview]
Message-ID: <51CBFE03.80603@linux.vnet.ibm.com> (raw)
In-Reply-To: <0134840@agluck-desk.sc.intel.com>

On 06/20/2013 02:46 PM, Luck, Tony wrote:
> From: Chen Gong <gong.chen@linux.intel.com>
>
> Update some SRAR severity conditions check to make it clearer
> according to latest Intel SDM Vol 3B (June 2013), table 15-20.
>
> Signed-off-by: Chen Gong <gong.chen@linux.intel.com>
> Signed-off-by: Tony Luck <tony.luck@intel.com>
> ---
>
> Chen Gong wrote:
>> If this patch is OK, would you please help to update it when merging
>> it? Thanks very much
>
> This is what I plan to apply.
> 1. Changed "user land" to "in a user process" (2 places) per Boris comment
> 2. Changed "non-affected" to "unaffected" per Naveen comment
>
> Anyone wants to jump on the "Acked-by" bandwagon - speak now.

Yep - looks fine to me.
Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>

Thanks,
Naveen

>
> -Tony
>
>   arch/x86/kernel/cpu/mcheck/mce-severity.c | 15 +++++----------
>   1 file changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
> index beb1f16..e2703520 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
> @@ -110,22 +110,17 @@ static struct severity {
>   	/* known AR MCACODs: */
>   #ifdef	CONFIG_MEMORY_FAILURE
>   	MCESEV(
> -		KEEP, "HT thread notices Action required: data load error",
> -		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
> -		MCGMASK(MCG_STATUS_EIPV, 0)
> +		KEEP, "Action required but unaffected thread is continuable",
> +		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR),
> +		MCGMASK(MCG_STATUS_RIPV, MCG_STATUS_RIPV)
>   		),
>   	MCESEV(
> -		AR, "Action required: data load error",
> +		AR, "Action required: data load error in a user process",
>   		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
>   		USER
>   		),
>   	MCESEV(
> -		KEEP, "HT thread notices Action required: instruction fetch error",
> -		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
> -		MCGMASK(MCG_STATUS_EIPV, 0)
> -		),
> -	MCESEV(
> -		AR, "Action required: instruction fetch error",
> +		AR, "Action required: instruction fetch error in a user process",
>   		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
>   		USER
>   		),
>


      parent reply	other threads:[~2013-06-27  8:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-20  9:16 [PATCH] x86/MCE: " Chen Gong
2013-06-20  9:41 ` Borislav Petkov
2013-06-21 12:38   ` Chen Gong
2013-06-25  6:32 ` Naveen N. Rao
2013-06-25 16:31   ` Luck, Tony
2013-06-25 20:08     ` Naveen N. Rao
2013-06-26  9:18     ` Chen Gong
     [not found]       ` <0134840@agluck-desk.sc.intel.com>
2013-06-26 19:08         ` [PATCH] x86/mce: " Borislav Petkov
2013-06-26 20:23           ` Luck, Tony
2013-06-26 20:36             ` Borislav Petkov
2013-06-26 21:00               ` Luck, Tony
2013-06-26 21:10                 ` Borislav Petkov
2013-06-27  6:42                   ` Chen Gong
2013-06-27  8:55         ` Naveen N. Rao [this message]

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