From: Dave Jiang <dave.jiang@intel.com>
To: Yili Zhang <zhangyili01@baidu.com>, linux-cxl@vger.kernel.org
Cc: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jic23@kernel.org>,
Shiju Jose <shiju.jose@huawei.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] cxl/edac: Bounds-check ECS threshold index from device
Date: Mon, 28 Sep 2026 11:21:29 -0700 [thread overview]
Message-ID: <51e4cfe6-b3c7-43ff-8b1c-512cfb23b9be@intel.com> (raw)
In-Reply-To: <20260928073553.85669-1-zhangyili01@baidu.com>
On 9/28/26 12:35 AM, Yili Zhang wrote:
> cxl_get_ecs_threshold() extracts a 3-bit index (0-7) from the
> device-supplied ECS config word and uses it to
> index ecs_supp_threshold[], which only has 6 elements. A device reporting
> index 6 or 7 causes an out-of-bounds read of adjacent .rodata, whose
> value is then returned to userspace via the EDAC 'threshold' sysfs
> attribute (small info leak and wrong reported threshold).
>
> Return 0 for indices outside the table.
Why return 0 instead of errno?
DJ
>
> Fixes: 85fb6a16ad14 ("cxl/edac: Add CXL memory device ECS control feature")
> Signed-off-by: Yili Zhang <zhangyili01@baidu.com>
> ---
> drivers/cxl/core/edac.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/cxl/core/edac.c b/drivers/cxl/core/edac.c
> index b321971fef58..73335b980b11 100644
> --- a/drivers/cxl/core/edac.c
> +++ b/drivers/cxl/core/edac.c
> @@ -633,6 +633,9 @@ static u16 cxl_get_ecs_threshold(u8 log_cap, u16 config)
> {
> u8 index = FIELD_GET(CXL_ECS_THRESHOLD_COUNT_MASK, config);
>
> + if (index >= ARRAY_SIZE(ecs_supp_threshold))
> + return 0;
> +
> return ecs_supp_threshold[index];
> }
>
next prev parent reply other threads:[~2026-09-28 18:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-28 7:35 Yili Zhang
2026-09-28 18:21 ` Dave Jiang [this message]
2026-09-29 3:17 ` Yili Zhang
2026-09-29 17:53 ` Alison Schofield
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