* [PATCH] ARM: dts: bcm2711: Add pcie0 alias
@ 2020-02-26 16:46 Nicolas Saenz Julienne
2020-02-26 17:17 ` Phil Elwell
2020-02-27 19:29 ` Florian Fainelli
0 siblings, 2 replies; 3+ messages in thread
From: Nicolas Saenz Julienne @ 2020-02-26 16:46 UTC (permalink / raw)
To: Rob Herring, Nicolas Saenz Julienne, Florian Fainelli
Cc: phil, devicetree, bcm-kernel-feedback-list, linux-rpi-kernel,
linux-arm-kernel, linux-kernel
Some bcm2711 revisions have different DMA constraints on the their PCIE
bus. The lower common denominator, being able to access the lower 3GB of
memory, is the default setting for now. Newer SoC revisions are able to
access the whole memory space.
Raspberry Pi 4's firmware is aware of this limitation and will correct
the PCIE's dma-ranges property if a pcie0 alias is available. So add
it.
Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
index cb3385262705..479f6828d73f 100644
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
@@ -21,6 +21,7 @@ memory@0 {
aliases {
ethernet0 = &genet;
+ pcie0 = &pcie0;
};
leds {
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] ARM: dts: bcm2711: Add pcie0 alias
2020-02-26 16:46 [PATCH] ARM: dts: bcm2711: Add pcie0 alias Nicolas Saenz Julienne
@ 2020-02-26 17:17 ` Phil Elwell
2020-02-27 19:29 ` Florian Fainelli
1 sibling, 0 replies; 3+ messages in thread
From: Phil Elwell @ 2020-02-26 17:17 UTC (permalink / raw)
To: Nicolas Saenz Julienne, Rob Herring, Florian Fainelli
Cc: phil, devicetree, bcm-kernel-feedback-list, linux-rpi-kernel,
linux-arm-kernel, linux-kernel
Hi Nicolas,
On 26/02/2020 16:46, Nicolas Saenz Julienne wrote:
> Some bcm2711 revisions have different DMA constraints on the their PCIE
> bus. The lower common denominator, being able to access the lower 3GB of
> memory, is the default setting for now. Newer SoC revisions are able to
> access the whole memory space.
>
> Raspberry Pi 4's firmware is aware of this limitation and will correct
> the PCIE's dma-ranges property if a pcie0 alias is available. So add
> it.
I can confirm that this is exactly what the firmware is looking for, so
Reviewed-by: Phil Elwell <phil@raspberrypi.com>
Phil
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ARM: dts: bcm2711: Add pcie0 alias
2020-02-26 16:46 [PATCH] ARM: dts: bcm2711: Add pcie0 alias Nicolas Saenz Julienne
2020-02-26 17:17 ` Phil Elwell
@ 2020-02-27 19:29 ` Florian Fainelli
1 sibling, 0 replies; 3+ messages in thread
From: Florian Fainelli @ 2020-02-27 19:29 UTC (permalink / raw)
To: bcm-kernel-feedback-list, Nicolas Saenz Julienne, Rob Herring
Cc: phil, devicetree, linux-rpi-kernel, linux-arm-kernel, linux-kernel
On Wed, 26 Feb 2020 17:46:00 +0100, Nicolas Saenz Julienne <nsaenzjulienne@suse.de> wrote:
> Some bcm2711 revisions have different DMA constraints on the their PCIE
> bus. The lower common denominator, being able to access the lower 3GB of
> memory, is the default setting for now. Newer SoC revisions are able to
> access the whole memory space.
>
> Raspberry Pi 4's firmware is aware of this limitation and will correct
> the PCIE's dma-ranges property if a pcie0 alias is available. So add
> it.
>
> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> ---
Applied to devicetree/fixes, thanks!
--
Florian
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-02-27 19:29 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-02-26 16:46 [PATCH] ARM: dts: bcm2711: Add pcie0 alias Nicolas Saenz Julienne
2020-02-26 17:17 ` Phil Elwell
2020-02-27 19:29 ` Florian Fainelli
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