From: Steven Price <steven.price@arm.com>
To: Karunika Choo <karunika.choo@arm.com>, dri-devel@lists.freedesktop.org
Cc: nd@arm.com, Boris Brezillon <boris.brezillon@collabora.com>,
Liviu Dudau <liviu.dudau@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/8] drm/panthor: Store IRQ register base iomem pointer in panthor_irq
Date: Wed, 22 Apr 2026 10:34:42 +0100 [thread overview]
Message-ID: <53a66bbd-7ed5-41d9-a15e-af17f292dea1@arm.com> (raw)
In-Reply-To: <20260412142951.2309135-5-karunika.choo@arm.com>
On 12/04/2026 15:29, Karunika Choo wrote:
> Update common IRQ handling code to work from an IRQ-local iomem base
> instead of referencing block-specific interrupt register offsets.
>
> Store the interrupt base address iomem pointer in struct panthor_irq and
> switch the shared IRQ helpers to use generic INT_* offsets from that
> local base. This removes the need for each caller to expose absolute IRQ
> register addresses while keeping the common IRQ flow unchanged.
>
> No functional change intended.
>
> v2:
> - Change IRQ request function to accept an iomem pointer instead of
> computing it from an offset argument.
>
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
One minor comment below...
> ---
> drivers/gpu/drm/panthor/panthor_device.h | 32 ++++++++++++++--------
> drivers/gpu/drm/panthor/panthor_fw.c | 5 ++--
> drivers/gpu/drm/panthor/panthor_fw_regs.h | 2 ++
> drivers/gpu/drm/panthor/panthor_gpu.c | 6 ++--
> drivers/gpu/drm/panthor/panthor_gpu_regs.h | 3 ++
> drivers/gpu/drm/panthor/panthor_mmu.c | 5 ++--
> drivers/gpu/drm/panthor/panthor_mmu_regs.h | 3 ++
> drivers/gpu/drm/panthor/panthor_pwr.c | 6 ++--
> 8 files changed, 42 insertions(+), 20 deletions(-)
>
[...]
> @@ -1470,7 +1470,8 @@ int panthor_fw_init(struct panthor_device *ptdev)
> if (irq <= 0)
> return -ENODEV;
>
> - ret = panthor_request_job_irq(ptdev, &fw->irq, irq, 0);
> + ret = panthor_request_job_irq(ptdev, &fw->irq, irq, 0,
> + ptdev->iomem + JOB_INT_BASE);
> if (ret) {
> drm_err(&ptdev->base, "failed to request job irq");
> return ret;
[..]
> @@ -162,7 +162,9 @@ int panthor_gpu_init(struct panthor_device *ptdev)
> if (irq < 0)
> return irq;
>
> - ret = panthor_request_gpu_irq(ptdev, &ptdev->gpu->irq, irq, GPU_INTERRUPTS_MASK);
> + ret = panthor_request_gpu_irq(ptdev, &ptdev->gpu->irq, irq,
> + GPU_INTERRUPTS_MASK,
> + ptdev->iomem + GPU_INT_BASE);
> if (ret)
> return ret;
>
[...]
> @@ -3229,7 +3229,8 @@ int panthor_mmu_init(struct panthor_device *ptdev)
> return -ENODEV;
>
> ret = panthor_request_mmu_irq(ptdev, &mmu->irq, irq,
> - panthor_mmu_fault_mask(ptdev, ~0));
> + panthor_mmu_fault_mask(ptdev, ~0),
> + ptdev->iomem + MMU_INT_BASE);
> if (ret)
> return ret;
>
[...]
> diff --git a/drivers/gpu/drm/panthor/panthor_pwr.c b/drivers/gpu/drm/panthor/panthor_pwr.c
> index aafb0c5c7d23..11c43de1ddd5 100644
> --- a/drivers/gpu/drm/panthor/panthor_pwr.c
> +++ b/drivers/gpu/drm/panthor/panthor_pwr.c
> @@ -70,7 +70,7 @@ static void panthor_pwr_irq_handler(struct panthor_device *ptdev, u32 status)
> }
> spin_unlock(&ptdev->pwr->reqs_lock);
> }
> -PANTHOR_IRQ_HANDLER(pwr, PWR, panthor_pwr_irq_handler);
> +PANTHOR_IRQ_HANDLER(pwr, panthor_pwr_irq_handler);
>
> static void panthor_pwr_write_command(struct panthor_device *ptdev, u32 command, u64 args)
> {
> @@ -464,7 +464,9 @@ int panthor_pwr_init(struct panthor_device *ptdev)
> if (irq < 0)
> return irq;
>
> - err = panthor_request_pwr_irq(ptdev, &pwr->irq, irq, PWR_INTERRUPTS_MASK);
> + err = panthor_request_pwr_irq(
> + ptdev, &pwr->irq, irq, PWR_INTERRUPTS_MASK,
> + ptdev->iomem + GPU_CONTROL_BASE + PWR_CONTROL_BASE);
This one is the odd one out because it adds GPU_CONTROL_BASE put the
other panthor_request_xxx_irq() calls don't. Sashiko also points out
that there's an argument these should all be using ptdev->gpu->iomem in
the final refactor.
Thanks,
Steve
> if (err)
> return err;
>
next prev parent reply other threads:[~2026-04-22 13:32 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-12 14:29 [PATCH v2 0/8] drm/panthor: Localize register access by component Karunika Choo
2026-04-12 14:29 ` [PATCH v2 1/8] drm/panthor: Pass an iomem pointer to GPU register access helpers Karunika Choo
2026-04-15 11:46 ` Liviu Dudau
2026-04-12 14:29 ` [PATCH v2 2/8] drm/panthor: Split register definitions by components Karunika Choo
2026-04-13 7:43 ` Boris Brezillon
2026-04-15 11:47 ` Liviu Dudau
2026-04-12 14:29 ` [PATCH v2 3/8] drm/panthor: Replace cross-component register accesses with helpers Karunika Choo
2026-04-13 7:44 ` Boris Brezillon
2026-04-15 11:48 ` Liviu Dudau
2026-04-12 14:29 ` [PATCH v2 4/8] drm/panthor: Store IRQ register base iomem pointer in panthor_irq Karunika Choo
2026-04-13 7:46 ` Boris Brezillon
2026-04-15 12:16 ` Liviu Dudau
2026-04-22 9:34 ` Steven Price [this message]
2026-04-22 16:08 ` Karunika Choo
2026-04-24 10:38 ` Steven Price
2026-04-24 11:03 ` Boris Brezillon
2026-04-24 11:20 ` Steven Price
2026-04-24 12:09 ` Boris Brezillon
2026-04-27 16:08 ` Karunika Choo
2026-04-12 14:29 ` [PATCH v2 5/8] drm/panthor: Use a local iomem base for GPU registers Karunika Choo
2026-04-15 12:19 ` Liviu Dudau
2026-04-12 14:29 ` [PATCH v2 6/8] drm/panthor: Use a local iomem base for PWR registers Karunika Choo
2026-04-13 7:51 ` Boris Brezillon
2026-04-15 12:21 ` Liviu Dudau
2026-04-12 14:29 ` [PATCH v2 7/8] drm/panthor: Use a local iomem base for firmware control registers Karunika Choo
2026-04-15 12:22 ` Liviu Dudau
2026-04-12 14:29 ` [PATCH v2 8/8] drm/panthor: Use a local iomem base for MMU AS registers Karunika Choo
2026-04-15 12:23 ` Liviu Dudau
2026-04-22 9:34 ` [PATCH v2 0/8] drm/panthor: Localize register access by component Steven Price
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