Re: [PATCH V2 net 1/2] net: hibmcge: disable Relaxed Ordering to fix RX packet corruption

[Paolo Abeni <pabeni@redhat.com>]

On 5/18/26 4:42 PM, Jijie Shao wrote:
> When SMMU is disabled, the hibmcge driver may receive corrupted packets.
> The hardware writes packet data and descriptors to the same page, but
> with Relaxed Ordering enabled, PCI write transactions may not be
> strictly ordered. This can cause the driver to observe a valid
> descriptor before the corresponding packet data is fully written.
> 
> Fix this by clearing PCI_EXP_DEVCTL_RELAX_EN in the PCI bridge control
> register to ensure strict write ordering between packet data and
> descriptors.
> 
> Fixes: f72e25594061 ("net: hibmcge: Implement rx_poll function to receive packets")
> Signed-off-by: Jijie Shao <shaojijie@huawei.com>
> ---
>  drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c
> index 068da2fd1fea..319551caf047 100644
> --- a/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c
> +++ b/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c
> @@ -420,6 +420,8 @@ static int hbg_pci_init(struct pci_dev *pdev)
>  		return -ENOMEM;
>  
>  	pci_set_master(pdev);
> +	pcie_capability_clear_word(pdev, PCI_EXP_DEVCTL,
> +				   PCI_EXP_DEVCTL_RELAX_EN);

Sashiko noted this will not survive a device reset - that performs
pci_restore_state - and you should likelly call pci_save_state(pdev)
afterwards.

/P