From: Jan Kiszka <jan.kiszka@siemens.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Nishanth Menon <nm@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Siddharth Vadapalli <s-vadapalli@ti.com>,
Bao Cheng Su <baocheng.su@siemens.com>,
Hua Qian Li <huaqian.li@siemens.com>,
Diogo Ivo <diogo.ivo@siemens.com>
Subject: Re: [PATCH v2 3/6] dt-bindings: PCI: ti,am65: Extend for use with PVU
Date: Tue, 27 Aug 2024 12:44:13 +0200 [thread overview]
Message-ID: <554cb065-6483-42be-bfed-9ed6d3b16fb1@siemens.com> (raw)
In-Reply-To: <afyz3i4xihir4fnt4djo45saytz5ubu3wel6munq7cinwcb55m@ohdelne4xf34>
On 27.08.24 08:37, Krzysztof Kozlowski wrote:
> On Mon, Aug 26, 2024 at 11:50:04PM +0200, Jan Kiszka wrote:
>> From: Jan Kiszka <jan.kiszka@siemens.com>
>>
>> Describe also the VMAP registers which are needed in order to make use
>> of the PVU with this PCI host. Furthermore, permit to specify a
>> restricted DMA pool by phandle.
>
> That's an ABI break without explanation why it is necessary.
>
>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>> ---
>> .../devicetree/bindings/pci/ti,am65-pci-host.yaml | 13 ++++++++++---
>> 1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> index 0a9d10532cc8..72f78f21e1e8 100644
>> --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> @@ -20,7 +20,7 @@ properties:
>> - ti,keystone-pcie
>>
>> reg:
>> - maxItems: 4
>> + maxItems: 6
>>
>> reg-names:
>> items:
>> @@ -28,6 +28,8 @@ properties:
>> - const: dbics
>> - const: config
>> - const: atu
>> + - const: vmap_lp
>> + - const: vmap_hp
>>
>> interrupts:
>> maxItems: 1
>> @@ -69,6 +71,9 @@ properties:
>> items:
>> pattern: '^pcie-phy[0-1]$'
>>
>> + memory-region:
>> + description: phandle to restricted DMA pool to be used for all devices behind this controller
>
> missing constraints, maxItems
>
In fact, that was intentional: There could also be multiple region
specified here. The driver already handles this.
Jan
--
Siemens AG, Technology
Linux Expert Center
next prev parent reply other threads:[~2024-08-27 10:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-26 21:50 [PATCH v2 0/6] soc: ti: Add and use PVU on K3-AM65 for DMA isolation Jan Kiszka
2024-08-26 21:50 ` [PATCH v2 1/6] dt-bindings: soc: ti: Add AM65 peripheral virtualization unit Jan Kiszka
2024-08-27 6:36 ` Krzysztof Kozlowski
2024-08-27 9:29 ` Jan Kiszka
2024-08-27 10:35 ` Krzysztof Kozlowski
2024-08-26 21:50 ` [PATCH v2 2/6] soc: ti: Add IOMPU-like PVU driver Jan Kiszka
2024-08-26 21:50 ` [PATCH v2 3/6] dt-bindings: PCI: ti,am65: Extend for use with PVU Jan Kiszka
2024-08-27 6:37 ` Krzysztof Kozlowski
2024-08-27 9:22 ` Jan Kiszka
2024-08-27 9:29 ` Krzysztof Kozlowski
2024-08-27 9:32 ` Jan Kiszka
2024-08-27 10:06 ` Siddharth Vadapalli
2024-08-27 10:46 ` Jan Kiszka
2024-08-27 10:54 ` Krzysztof Kozlowski
2024-08-27 10:44 ` Jan Kiszka [this message]
2024-08-27 10:55 ` Krzysztof Kozlowski
2024-08-26 21:50 ` [PATCH v2 4/6] arm64: dts: ti: k3-am65-main: Add VMAP registers to PCI root complexes Jan Kiszka
2024-08-26 21:50 ` [PATCH v2 5/6] PCI: keystone: Add supported for PVU-based DMA isolation on AM654 Jan Kiszka
2024-08-26 21:50 ` [PATCH v2 6/6] arm64: dts: ti: iot2050: Enforce DMA isolation for devices behind PCI RC Jan Kiszka
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