From: Paolo Bonzini <pbonzini@redhat.com>
To: Anup Patel <anup.patel@wdc.com>, Shuah Khan <shuah@kernel.org>,
Atish Patra <atishp@atishpatra.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH 1/4] RISC-V: KVM: Forward SBI experimental and vendor extensions
Date: Fri, 26 Nov 2021 17:12:35 +0100 [thread overview]
Message-ID: <558e7e30-2d87-a19c-c85c-a2993a354074@redhat.com> (raw)
In-Reply-To: <20211126154020.342924-2-anup.patel@wdc.com>
On 11/26/21 16:40, Anup Patel wrote:
> +static int kvm_sbi_ext_expevend_handler(struct kvm_vcpu *vcpu,
> + struct kvm_run *run,
> + unsigned long *out_val,
> + struct kvm_cpu_trap *utrap,
> + bool *exit)
Doesn't really matter what this is used for, it's a handler that
forwards. So you can name it kvm_sbi_ext_forward_handler.
Paolo
> +{
> + /*
> + * Both SBI experimental and vendor extensions are
> + * unconditionally forwarded to userspace.
> + */
> + kvm_riscv_vcpu_sbi_forward(vcpu, run);
> + *exit = true;
> + return 0;
> +}
> +
next prev parent reply other threads:[~2021-11-26 16:14 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 15:40 [PATCH 0/4] KVM RISC-V 64-bit selftests support Anup Patel
2021-11-26 15:40 ` [PATCH 1/4] RISC-V: KVM: Forward SBI experimental and vendor extensions Anup Patel
2021-11-26 16:12 ` Paolo Bonzini [this message]
2021-11-29 3:39 ` Anup Patel
2021-11-26 15:40 ` [PATCH 2/4] RISC-V: KVM: Add VM capability to allow userspace get GPA size Anup Patel
2021-11-26 16:13 ` Paolo Bonzini
2021-11-29 3:40 ` Anup Patel
2021-11-26 15:40 ` [PATCH 3/4] KVM: selftests: Add EXTRA_CFLAGS in top-level Makefile Anup Patel
2021-11-26 16:15 ` Paolo Bonzini
2021-11-29 3:43 ` Anup Patel
2021-11-26 15:40 ` [PATCH 4/4] KVM: selftests: Add initial support for RISC-V 64-bit Anup Patel
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