From: "majun (F)" <majun258@huawei.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Catalin Marinas <Catalin.Marinas@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Will Deacon <Will.Deacon@arm.com>,
Mark Rutland <Mark.Rutland@arm.com>,
"jason@lakedaemon.net" <jason@lakedaemon.net>,
"lizefan@huawei.com" <lizefan@huawei.com>,
"huxinwei@huawei.com" <huxinwei@huawei.com>,
"dingtianhong@huawei.com" <dingtianhong@huawei.com>,
"zhaojunhua@hisilicon.com" <zhaojunhua@hisilicon.com>,
"liguozhu@hisilicon.com" <liguozhu@hisilicon.com>,
"xuwei5@hisilicon.com" <xuwei5@hisilicon.com>,
"wei.chenwei@hisilicon.com" <wei.chenwei@hisilicon.com>,
"guohanjun@huawei.com" <guohanjun@huawei.com>,
"wuyun.wu@huawei.com" <wuyun.wu@huawei.com>,
"guodong.xu@linaro.org" <guodong.xu@linaro.org>,
"haojian.zhuang@linaro.org" <haojian.zhuang@linaro.org>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>,
"usman.ahmad@linaro.org" <usman.ahmad@linaro.org>
Subject: Re: [PATCH v3 1/3] IRQ/Gic-V3: Add mbigen driver to support mbigen interrupt controller
Date: Thu, 16 Jul 2015 20:26:33 +0800 [thread overview]
Message-ID: <55A7A2F9.3000306@huawei.com> (raw)
In-Reply-To: <55A77999.9000203@arm.com>
在 2015/7/16 17:30, Marc Zyngier 写道:
> On 16/07/15 10:22, majun (F) wrote:
>>
>>
>> 在 2015/7/16 16:52, Marc Zyngier 写道:
>>> On 16/07/15 09:35, majun (F) wrote:
>>
>>>>> I'm a bit puzzled.
>>>>
>>>> For interrupts connect to mbigen , the interrupt trigger type, device id and
>>>> event id value are encoded in mbigen chip already.
>>>>
>>>> There are two types of mbigen node within a mbigen chip.
>>>> Type1: event id valud can't be programmed.
>>>> Type2: event id value can be programmed.
>>>>
>>>> For example: An device with 5 interrupts connected to Mbigen node
>>>> type 1.The default event id vlaue encoded in mbigen chip for these 5 interrupt
>>>> is from 0 to 4.
>>>>
>>>> Because the event id value can't be programmed, we need to define all of
>>>> 5 interrupts in dts file so that these 5 interrupt has
>>>
>>> You can define what you want in the device tree, the ITS doesn't care!
>>> Nothing in the ITS code parses this property, and there is absolutely
>>> zero chance that the even the ITS has allocated will actually match what
>>> you expect.
>>>
>>> The ITS *relies* on the principle that the evenID can be programmed,
>>> just like any MSI controller relies on the device to be programmed with
>>> whatever payload has been provided. If all of a sudden we have to
>>> support HW that has its own view of the payload, what you have here will
>>> simply not work.
>>>
>> "If all of a sudden we have to
>> support HW that has its own view of the payload, what you have here will
>> simply not work."
>>
>> I am not very unstand this case, would you please explain this more detail?
>
> It is the ITS driver that allocates the eventID, not the device. If your
> hardware has decided that it will use event 5, while the ITS expect it
> to use event 3, nothing will work. And there is no way for the ITS to
> know which event your device is using (it doesn't parse your device's
> device tree).
>
Yes, I agree with you that eventID should be allocated by ITS driver.
But I want to explain the case you said above can be avoided.
For example, An device with total 5 interrupts connected to Mbigen node.
In mbigen chip, the default eventID value for each device starts from 0.
So, for these 5 interrupts the default eventID value is from 0 to 4.
Because the default eventID is fixed in mbigen chip, to make these 5 interrupt
work, the only way is define all these 5 interrupts in dts file.
When irq initializing, ITS driver will allocat LPI interrupt number for these
5 interrupts, for example : from 8192 to 8196. and the eventID value is from 0 to 4.
Now, the allocated eventID value same as the eventID value encoded in mbigen chip,
The interrupt can work.
I know this is not a good method,but for current mbigen chip,it's the only solution.
next prev parent reply other threads:[~2015-07-16 12:29 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-06 7:09 [PATCH v3 0/3] IRQ/Gic-V3:Support Mbigen " Ma Jun
2015-07-06 7:09 ` [PATCH v3 1/3] IRQ/Gic-V3: Add mbigen driver to support mbigen " Ma Jun
2015-07-06 12:33 ` Thomas Gleixner
2015-07-08 4:21 ` majun (F)
2015-07-08 10:44 ` Thomas Gleixner
2015-07-16 8:35 ` majun (F)
2015-07-08 15:16 ` Marc Zyngier
2015-07-16 8:35 ` majun (F)
2015-07-16 8:52 ` Marc Zyngier
2015-07-16 9:22 ` majun (F)
2015-07-16 9:30 ` Marc Zyngier
2015-07-16 12:26 ` majun (F) [this message]
2015-07-16 13:37 ` Marc Zyngier
2015-07-27 2:25 ` majun (F)
2015-07-08 15:30 ` Marc Zyngier
2015-07-16 8:35 ` majun (F)
2015-07-06 7:09 ` [PATCH v3 2/3] IRQ/Gic-V3: Change arm-gic-its to support the Mbigen interrupt Ma Jun
2015-07-06 7:09 ` [PATCH v3 3/3] dt-binding:Documents the mbigen bindings Ma Jun
2015-07-08 13:40 ` Mark Rutland
2015-07-08 14:01 ` Marc Zyngier
2015-07-16 8:35 ` majun (F)
2015-07-20 16:38 ` Mark Rutland
2015-07-25 3:03 ` majun (F)
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