Re: [RFC PATCH 2/4] spi: cadence-xspi: add ACMD support for SPI NAND

[Mark Brown <broonie@kernel.org>]

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On Fri, Sep 25, 2026 at 02:59:15PM +0200, Miquel Raynal wrote:
> On 25/09/2026 at 12:59:49 +01, Mark Brown <broonie@kernel.org> wrote:

> > It might potentially help a heavily loaded system if you can do fewer
> > waits, the rest of the tasks running on the system will have more time
> > if we're doing fewer waits for interrupts.  Not sure it'd be enough to
> > write home about though.

> Definitely, but this is already possible, one may implement
> ctlr->mem_ops->poll_status. This way the core can leverage the hardware
> to perform the polling. It is not directly visible on benchmarks,
> because it won't reduce much the wait time, but the system load will
> decrease.

You'd still get a benefit from taking just one interrupt per sequence
rather than one per operation, that can help when the system is heavily
loaded.

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