From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: ipq5210: Enable USB and PCIe on RDP504
Date: Tue, 21 Jul 2026 17:36:23 +0200 [thread overview]
Message-ID: <56522c76-389b-486b-ac64-ded7745f512f@oss.qualcomm.com> (raw)
In-Reply-To: <20260715-08-dts-v2-2-b060b68e0256@oss.qualcomm.com>
On 7/15/26 9:11 AM, Varadarajan Narayanan wrote:
> RDP504 has USB, PCIe and SPI NAND devices populated. EMMC and NAND
> share the GPIOs. The board has to be reworked to change from EMMC
> to NAND variant. Hence add the NAND node but do not enable it.
Does that warrant adding a DT for both variants, both inheriting a
common .dtsi and making the necessary amends?
> Describe the fixed USB regulators, PCIe reset GPIOs, QPIC SPI NAND flash
Are they controllable? Are they provided by some PMIC?
[...]
> +&pcie0 {
> + pinctrl-0 = <&pcie0_default_state>;
> + pinctrl-names = "default";
> + status = "okay";
Please keep a \n before 'status', uniformly, file-wide
Also 'pcie0' goes before 'pcie0_foo'
Konrad
next prev parent reply other threads:[~2026-07-21 15:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 7:11 [PATCH v2 0/2] Enable mutliple peripherals in IPQ5210 Varadarajan Narayanan
2026-07-15 7:11 ` [PATCH v2 1/2] arm64: dts: qcom: ipq5210: Add nodes for multiple peripherals Varadarajan Narayanan
2026-07-21 15:34 ` Konrad Dybcio
2026-07-15 7:11 ` [PATCH v2 2/2] arm64: dts: qcom: ipq5210: Enable USB and PCIe on RDP504 Varadarajan Narayanan
2026-07-21 15:36 ` Konrad Dybcio [this message]
2026-07-22 11:08 ` Varadarajan Narayanan
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