* [PATCH] clk: qcom: negcc-nord: Add frequencies for ne_gcc_sdcc4_apps_clk_src
@ 2026-10-09 4:15 Jagadeesh Kona
2026-10-09 4:27 ` Taniya Das
0 siblings, 1 reply; 2+ messages in thread
From: Jagadeesh Kona @ 2026-10-09 4:15 UTC (permalink / raw)
To: Bjorn Andersson, Abel Vesa, Stephen Boyd, Brian Masney, Jerome Brunet
Cc: linux-arm-msm, linux-clk, linux-kernel, Ajit Pandey, Imran Shaik,
Taniya Das, Jagadeesh Kona
Add the frequency table entries for ne_gcc_sdcc4_apps_clk_src to support
the additional clock rates required on the Nord platform.
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
---
drivers/clk/qcom/negcc-nord.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/qcom/negcc-nord.c b/drivers/clk/qcom/negcc-nord.c
index 68ce4d6278baa5888b277fb34a135d7e5beb789a..a72fce70de45ced4635e7091140e63b5148decfc 100644
--- a/drivers/clk/qcom/negcc-nord.c
+++ b/drivers/clk/qcom/negcc-nord.c
@@ -436,6 +436,11 @@ static struct clk_rcg2 ne_gcc_qupv3_wrap2_s6_clk_src = {
};
static const struct freq_tbl ftbl_ne_gcc_sdcc4_apps_clk_src[] = {
+ F(144000, P_BI_TCXO, 16, 3, 25),
+ F(400000, P_BI_TCXO, 12, 1, 4),
+ F(19200000, P_BI_TCXO, 1, 0, 0),
+ F(20000000, P_NE_GCC_GPLL0_OUT_MAIN, 30, 0, 0),
+ F(25000000, P_NE_GCC_GPLL0_OUT_MAIN, 24, 0, 0),
F(37500000, P_NE_GCC_GPLL0_OUT_MAIN, 16, 0, 0),
F(50000000, P_NE_GCC_GPLL0_OUT_MAIN, 12, 0, 0),
F(100000000, P_NE_GCC_GPLL0_OUT_MAIN, 6, 0, 0),
---
base-commit: aac26bee2287c88af5be5a5ff96d783b19a28790
change-id: 20261009-nord-sdcc-clk-1b23f4eb4177
Best regards,
--
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] clk: qcom: negcc-nord: Add frequencies for ne_gcc_sdcc4_apps_clk_src
2026-10-09 4:15 [PATCH] clk: qcom: negcc-nord: Add frequencies for ne_gcc_sdcc4_apps_clk_src Jagadeesh Kona
@ 2026-10-09 4:27 ` Taniya Das
0 siblings, 0 replies; 2+ messages in thread
From: Taniya Das @ 2026-10-09 4:27 UTC (permalink / raw)
To: Jagadeesh Kona, Bjorn Andersson, Abel Vesa, Stephen Boyd,
Brian Masney, Jerome Brunet
Cc: linux-arm-msm, linux-clk, linux-kernel, Ajit Pandey, Imran Shaik
On 10/9/2026 9:45 AM, Jagadeesh Kona wrote:
> Add the frequency table entries for ne_gcc_sdcc4_apps_clk_src to support
> the additional clock rates required on the Nord platform.
>
> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
> ---
> drivers/clk/qcom/negcc-nord.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/clk/qcom/negcc-nord.c b/drivers/clk/qcom/negcc-nord.c
> index 68ce4d6278baa5888b277fb34a135d7e5beb789a..a72fce70de45ced4635e7091140e63b5148decfc 100644
> --- a/drivers/clk/qcom/negcc-nord.c
> +++ b/drivers/clk/qcom/negcc-nord.c
> @@ -436,6 +436,11 @@ static struct clk_rcg2 ne_gcc_qupv3_wrap2_s6_clk_src = {
> };
>
> static const struct freq_tbl ftbl_ne_gcc_sdcc4_apps_clk_src[] = {
> + F(144000, P_BI_TCXO, 16, 3, 25),
> + F(400000, P_BI_TCXO, 12, 1, 4),
> + F(19200000, P_BI_TCXO, 1, 0, 0),
> + F(20000000, P_NE_GCC_GPLL0_OUT_MAIN, 30, 0, 0),
> + F(25000000, P_NE_GCC_GPLL0_OUT_MAIN, 24, 0, 0),
> F(37500000, P_NE_GCC_GPLL0_OUT_MAIN, 16, 0, 0),
> F(50000000, P_NE_GCC_GPLL0_OUT_MAIN, 12, 0, 0),
> F(100000000, P_NE_GCC_GPLL0_OUT_MAIN, 6, 0, 0),
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
--
Thanks,
Taniya Das
^ permalink raw reply [flat|nested] 2+ messages in thread
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2026-10-09 4:15 [PATCH] clk: qcom: negcc-nord: Add frequencies for ne_gcc_sdcc4_apps_clk_src Jagadeesh Kona
2026-10-09 4:27 ` Taniya Das
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