mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Jon Hunter <jonathanh@nvidia.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	"Benoît Cousson" <bcousson@baylibre.com>,
	"Tony Lindgren" <tony@atomide.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Pawel Moll" <pawel.moll@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
	"Kumar Gala" <galak@codeaurora.org>,
	"Stephen Warren" <swarren@wwwdotorg.org>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Kevin Hilman" <khilman@kernel.org>,
	"Grygorii Strashko" <grygorii.strashko@ti.com>,
	"Lars-Peter Clausen" <lars@metafoo.de>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	linux-tegra@vger.kernel.org,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 14/15] dt-bindings: arm-gic: Drop 'clock-names' from binding document
Date: Fri, 18 Mar 2016 10:13:57 +0000	[thread overview]
Message-ID: <56EBD4E5.1060002@nvidia.com> (raw)
In-Reply-To: <CAMuHMdV0QiWR0bML44zhAx+MStmQhQWKd=b_TMKnEdu_hw_ReA@mail.gmail.com>


On 18/03/16 09:13, Geert Uytterhoeven wrote:
> Hi Jon,
> 
> On Thu, Mar 17, 2016 at 3:19 PM, Jon Hunter <jonathanh@nvidia.com> wrote:
>> Commit afbbd2338176 ("irqchip/gic: Document optional Clock and Power
>> Domain properties") documented optional clock and power-dmoain properties
>> for the ARM GIC. Currently, there are no users of these and for the
>> Tegra210 Audio GIC (based upon the GIC-400) there are two clocks, a
>> functional clock and interface clock, that need to be enabled.
> 
> The reason that there are no users for this is twofold:
>   1. The GIC driver doesn't have Runtime PM support yet,
>   2. There was no clean way to prevent the GIC's clock from being disabled.
> Due to this, adding the clocks to the DTSes would mean that they will be
> disabled during boot up as unused clocks, leading to a system lock-up.
> 
> I had hoped your series would fix part 1. I gave it a try on r8a7791/koelsch,
> but unfortunately it seems the platform driver only supports non-root
> controllers, while the r8a7791 GIC is the primary one...

Can you try making the following change ...

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 9e7cf7abf757..2e971e600036 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -1372,7 +1372,7 @@ static int gic_probe(struct platform_device *pdev)
        void __iomem *dist_base;
        void __iomem *cpu_base;
        u32 percpu_offset;
-       int ret, irq;
+       int ret, irq = 0;
 
        if (dev->of_node == NULL)
                return -EINVAL;
@@ -1393,11 +1393,8 @@ static int gic_probe(struct platform_device *pdev)
        if (ret < 0)
                goto rpm_disable;
 
-       irq = irq_of_parse_and_map(dev->of_node, 0);
-       if (!irq) {
-               ret = -EINVAL;
-               goto rpm_put;
-       }
+       if (of_irq_count(dev->of_node) > 0)
+               irq = irq_of_parse_and_map(dev->of_node, 0);
 
        ret = gic_of_setup(dev->of_node, &dist_base, &cpu_base, &percpu_offset);
        if (ret)
@@ -1411,7 +1408,8 @@ static int gic_probe(struct platform_device *pdev)
 
        gic->chip.parent = dev;
 
-       irq_set_chained_handler_and_data(irq, gic_handle_cascade_irq, gic);
+       if (irq)
+               irq_set_chained_handler_and_data(irq, gic_handle_cascade_irq, gic);
 
        pm_runtime_put(dev);
 
@@ -1424,7 +1422,6 @@ gic_unmap:
        iounmap(cpu_base);
 irq_dispose:
        irq_dispose_mapping(irq);
-rpm_put:
        pm_runtime_put_sync(dev);
 rpm_disable:
        pm_runtime_disable(dev);

 
> Alternatively, part 2 can to be fixed by "clk: introduce CLK_ENABLE_HAND_OFF
> flag", combined with the clock driver setting the flag when needed.
> Unfortunately that patch is not yet upstream, and not even in -next.
> Note that drivers/clk/renesas/renesas-cpg-mssr.c already handles
> CLK_ENABLE_HAND_OFF if present, and else just ignores the clock.
> So I could already add the clock to r8a7795.dtsi, which uses that driver.
> 
> For older SoCs, the module clocks are described in the dtsi, and I would need a
> crude hack to enable CLK_ENABLE_HAND_OFF in the clock driver.
> 
>> To allow flexibility, drop the 'clock-names' from the GIC binding and
>> just provide a list of clocks which the driver can parse. It is assumed
>> that any clocks that are listed, need to be enabled in order to access
>> the GIC.
> 
> Originally I just wanted to have "clocks", and let the details be handled by
> SoC-specific code. However, Mark Rutland insisted on using the clock naming
> from the GIC TRMs, as the number of clocks and their names depend on the
> GIC variant.
> 
> Apparently they also depend on the SoC...

Yes this case is a little different because the GIC is a 2nd level GIC.

Cheers
Jon

  reply	other threads:[~2016-03-18 10:14 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-17 14:19 [PATCH 00/15] Add support for Tegra210 AGIC Jon Hunter
2016-03-17 14:19 ` [PATCH 01/15] ARM: tegra: Correct interrupt type for ARM TWD Jon Hunter
2016-04-01 23:25   ` Kevin Hilman
2016-04-05 14:04   ` Thierry Reding
2016-03-17 14:19 ` [PATCH 02/15] ARM: OMAP: " Jon Hunter
2016-03-18 15:41   ` Grygorii Strashko
2016-03-29 14:02     ` Jon Hunter
2016-03-30 21:23       ` Tony Lindgren
2016-03-17 14:19 ` [PATCH 03/15] irqchip/gic: Don't unnecessarily write the IRQ configuration Jon Hunter
2016-04-09 10:50   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 04/15] irqchip/gic: WARN if setting the interrupt type fails Jon Hunter
2016-03-17 14:51   ` Thomas Gleixner
2016-03-17 15:04     ` Jon Hunter
2016-03-17 15:18       ` Jason Cooper
2016-03-17 16:20         ` Jon Hunter
2016-03-18  9:20           ` Geert Uytterhoeven
2016-03-18  9:54             ` Jon Hunter
2016-03-18 10:22               ` Geert Uytterhoeven
2016-04-09 10:58       ` Marc Zyngier
2016-04-11 15:31         ` Jon Hunter
2016-04-11 15:39           ` Marc Zyngier
2016-04-12  8:50             ` Jon Hunter
2016-04-12 10:14               ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 05/15] irqchip: Mask the non-type/sense bits when translating an IRQ Jon Hunter
2016-04-09 11:03   ` Marc Zyngier
2016-04-19 14:14     ` Jon Hunter
2016-04-19 14:23       ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 06/15] irqdomain: Ensure type settings match for an existing mapping Jon Hunter
2016-03-17 18:18   ` Jon Hunter
2016-03-18 10:03     ` Grygorii Strashko
2016-03-18 10:33       ` Jon Hunter
2016-03-17 14:19 ` [PATCH 07/15] irqdomain: Don't set type when mapping an IRQ Jon Hunter
2016-03-17 14:55   ` Thomas Gleixner
2016-03-17 15:06     ` Jon Hunter
2016-03-17 18:19   ` Jon Hunter
2016-03-17 14:19 ` [PATCH 08/15] genirq: Add runtime power management support for IRQ chips Jon Hunter
2016-03-17 15:02   ` Marc Zyngier
2016-03-17 15:13     ` Jon Hunter
2016-03-17 15:28       ` Marc Zyngier
2016-03-22 11:46         ` Linus Walleij
2016-03-17 15:02   ` Thomas Gleixner
2016-03-17 15:46     ` Jon Hunter
2016-03-18 11:11   ` Grygorii Strashko
2016-03-18 12:27     ` Jon Hunter
2016-03-18 14:23       ` Grygorii Strashko
2016-03-18 14:40         ` Jon Hunter
2016-03-18 14:56           ` Jon Hunter
2016-03-18 17:52             ` Grygorii Strashko
2016-03-21 10:09               ` Jon Hunter
2016-03-17 14:19 ` [PATCH 09/15] irqchip/gic: Don't initialise chip if mapping IO space fails Jon Hunter
2016-04-09 11:09   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 10/15] irqchip/gic: Remove static irq_chip definition for eoimode1 Jon Hunter
2016-03-22 11:49   ` Linus Walleij
2016-04-09 11:38   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 11/15] irqchip/gic: Return an error if GIC initialisation fails Jon Hunter
2016-04-09 11:43   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 12/15] irqchip/gic: Pass GIC pointer to save/restore functions Jon Hunter
2016-04-09 11:52   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 13/15] irqchip/gic: Prepare for adding platform driver Jon Hunter
2016-03-29 13:04   ` Geert Uytterhoeven
2016-03-29 13:59     ` Jon Hunter
2016-03-17 14:19 ` [PATCH 14/15] dt-bindings: arm-gic: Drop 'clock-names' from binding document Jon Hunter
2016-03-17 20:14   ` Rob Herring
2016-03-18  8:37     ` Jon Hunter
2016-04-12  8:54       ` Jon Hunter
2016-03-18  9:13   ` Geert Uytterhoeven
2016-03-18 10:13     ` Jon Hunter [this message]
2016-03-18 10:52       ` Geert Uytterhoeven
2016-03-18 10:56         ` Jon Hunter
2016-03-18 12:05           ` Geert Uytterhoeven
2016-03-18 12:42             ` Jon Hunter
2016-03-18 12:47             ` Grygorii Strashko
2016-03-18 13:02               ` Geert Uytterhoeven
2016-03-18 18:36                 ` Grygorii Strashko
2016-03-17 14:19 ` [PATCH 15/15] irqchip/gic: Add support for tegra AGIC interrupt controller Jon Hunter

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=56EBD4E5.1060002@nvidia.com \
    --to=jonathanh@nvidia.com \
    --cc=bcousson@baylibre.com \
    --cc=devicetree@vger.kernel.org \
    --cc=galak@codeaurora.org \
    --cc=geert@linux-m68k.org \
    --cc=grygorii.strashko@ti.com \
    --cc=ijc+devicetree@hellion.org.uk \
    --cc=jason@lakedaemon.net \
    --cc=khilman@kernel.org \
    --cc=lars@metafoo.de \
    --cc=linus.walleij@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-omap@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=pawel.moll@arm.com \
    --cc=robh+dt@kernel.org \
    --cc=swarren@wwwdotorg.org \
    --cc=tglx@linutronix.de \
    --cc=thierry.reding@gmail.com \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

Powered by JetHome