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From: Grygorii Strashko <grygorii.strashko@ti.com>
To: "Jon Hunter" <jonathanh@nvidia.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	"Benoît Cousson" <bcousson@baylibre.com>,
	"Tony Lindgren" <tony@atomide.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Pawel Moll" <pawel.moll@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
	"Kumar Gala" <galak@codeaurora.org>,
	"Stephen Warren" <swarren@wwwdotorg.org>,
	"Thierry Reding" <thierry.reding@gmail.com>
Cc: Kevin Hilman <khilman@kernel.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Lars-Peter Clausen <lars@metafoo.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	<linux-tegra@vger.kernel.org>, <linux-omap@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 08/15] genirq: Add runtime power management support for IRQ chips
Date: Fri, 18 Mar 2016 13:11:00 +0200	[thread overview]
Message-ID: <56EBE244.6070400@ti.com> (raw)
In-Reply-To: <1458224359-32665-9-git-send-email-jonathanh@nvidia.com>

Hi Jon,

On 03/17/2016 04:19 PM, Jon Hunter wrote:
> Some IRQ chips may be located in a power domain outside of the CPU
> subsystem and hence will require device specific runtime power
> management. In order to support such IRQ chips, add a pointer for a
> device structure to the irq_chip structure, and if this pointer is
> populated by the IRQ chip driver and CONFIG_PM is selected in the kernel
> configuration, then the pm_runtime_get/put APIs for this chip will be
> called when an IRQ is requested/freed, respectively.
> 
> When entering system suspend and each interrupt is disabled if there is
> no wake-up set for that interrupt. For an IRQ chip that utilises runtime
> power management, print a warning message for each active interrupt that
> has no wake-up set because these interrupts may be unnecessarily keeping
> the IRQ chip enabled during system suspend.
> 
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
> ---
>   include/linux/irq.h    |  5 +++++
>   kernel/irq/chip.c      | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++
>   kernel/irq/internals.h |  1 +
>   kernel/irq/manage.c    | 14 +++++++++++---
>   kernel/irq/pm.c        |  3 +++
>   5 files changed, 72 insertions(+), 3 deletions(-)
> 
> diff --git a/include/linux/irq.h b/include/linux/irq.h
> index c4de62348ff2..82f36390048d 100644
> --- a/include/linux/irq.h
> +++ b/include/linux/irq.h
> @@ -315,6 +315,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>   /**
>    * struct irq_chip - hardware interrupt chip descriptor
>    *
> + * @parent:		pointer to associated device
>    * @name:		name for /proc/interrupts
>    * @irq_startup:	start up the interrupt (defaults to ->enable if NULL)
>    * @irq_shutdown:	shut down the interrupt (defaults to ->disable if NULL)
> @@ -354,6 +355,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>    * @flags:		chip specific flags
>    */

[..]

>   
> diff --git a/kernel/irq/pm.c b/kernel/irq/pm.c
> index cea1de0161f1..ab436119084f 100644
> --- a/kernel/irq/pm.c
> +++ b/kernel/irq/pm.c
> @@ -83,6 +83,9 @@ static bool suspend_device_irq(struct irq_desc *desc)
>   		 * suspend_device_irqs().
>   		 */
>   		return true;
> +	} else if (!irq_chip_pm_suspended(&desc->irq_data)) {
> +		pr_warn("irq %d has no wakeup set and has not been freed!\n",
> +			desc->irq_data.irq);

Sry. But I did not get this part of the patch :(

static bool suspend_device_irq(struct irq_desc *desc)
{
	if (!desc->action || irq_desc_is_chained(desc) ||
	    desc->no_suspend_depth) {
		pr_err("skip irq %d\n", irq_desc_get_irq(desc));
		return false;
	}

	if (irqd_is_wakeup_set(&desc->irq_data)) {
		irqd_set(&desc->irq_data, IRQD_WAKEUP_ARMED);
		/*
		 * We return true here to force the caller to issue
		 * synchronize_irq(). We need to make sure that the
		 * IRQD_WAKEUP_ARMED is visible before we return from
		 * suspend_device_irqs().
		 */
		pr_err("wakeup irq %d\n", irq_desc_get_irq(desc));
		return true;
	}

^^^^ Here you've added a warning 

	desc->istate |= IRQS_SUSPENDED;
	__disable_irq(desc);

^^^^ Here non wakeup IRQs will be disabled

	pr_err("%s __disable_irq irq %d\n", irq_desc_get_chip(desc)->name, irq_desc_get_irq(desc));

	/*
	 * Hardware which has no wakeup source configuration facility
	 * requires that the non wakeup interrupts are masked at the
	 * chip level. The chip implementation indicates that with
	 * IRQCHIP_MASK_ON_SUSPEND.
	 */
	if (irq_desc_get_chip(desc)->flags & IRQCHIP_MASK_ON_SUSPEND) {
		mask_irq(desc);
		pr_err("%s mask_irq irq %d\n", irq_desc_get_chip(desc)->name, irq_desc_get_irq(desc));
	}

	return true;
}

As result, there should be a ton of warnings if one IRQ (for example in GPIO irqchip)
is wakeup source, but all other are not. 

Also I'd like to note that:
- it is not expected that any IRQs have to be freed on enter Suspend
- Primary interrupt controller is expected to be suspended from syscore_suspend()
- not Primary interrupt controllers may be Suspended from:
  -- dpm_suspend() or dpm_suspend_late() - usual case for external interrupt controllers
  GPIO expanders (I2C, SPI ..)
  -- dpm_suspend_noirq() - usual case for SoC peripherals like OMAP GPIO
	dpm_suspend_noirq
	|- suspend_device_irqs()
	|- device_suspend_noirq() [1] <-- OMAP GPIO do suspend here.
  -- as always, some arches/maches may require hacks in platform code.
  
So, In my opinion, suspend has to be handled by each irqchip driver separately,
most probably at suspend_noirq level [1], because only  irqchip driver  
now sees a full picture and knows if it can suspend or not, and when, and how.
(may require to use pm_runtime_force_suspend/resume()).

I propose do not touch common/generic suspend code now. Any common code can be always
refactored later once there will be real drivers updated to use irqchip RPM
and which will support Suspend.


-- 
regards,
-grygorii

  parent reply	other threads:[~2016-03-18 11:12 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-17 14:19 [PATCH 00/15] Add support for Tegra210 AGIC Jon Hunter
2016-03-17 14:19 ` [PATCH 01/15] ARM: tegra: Correct interrupt type for ARM TWD Jon Hunter
2016-04-01 23:25   ` Kevin Hilman
2016-04-05 14:04   ` Thierry Reding
2016-03-17 14:19 ` [PATCH 02/15] ARM: OMAP: " Jon Hunter
2016-03-18 15:41   ` Grygorii Strashko
2016-03-29 14:02     ` Jon Hunter
2016-03-30 21:23       ` Tony Lindgren
2016-03-17 14:19 ` [PATCH 03/15] irqchip/gic: Don't unnecessarily write the IRQ configuration Jon Hunter
2016-04-09 10:50   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 04/15] irqchip/gic: WARN if setting the interrupt type fails Jon Hunter
2016-03-17 14:51   ` Thomas Gleixner
2016-03-17 15:04     ` Jon Hunter
2016-03-17 15:18       ` Jason Cooper
2016-03-17 16:20         ` Jon Hunter
2016-03-18  9:20           ` Geert Uytterhoeven
2016-03-18  9:54             ` Jon Hunter
2016-03-18 10:22               ` Geert Uytterhoeven
2016-04-09 10:58       ` Marc Zyngier
2016-04-11 15:31         ` Jon Hunter
2016-04-11 15:39           ` Marc Zyngier
2016-04-12  8:50             ` Jon Hunter
2016-04-12 10:14               ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 05/15] irqchip: Mask the non-type/sense bits when translating an IRQ Jon Hunter
2016-04-09 11:03   ` Marc Zyngier
2016-04-19 14:14     ` Jon Hunter
2016-04-19 14:23       ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 06/15] irqdomain: Ensure type settings match for an existing mapping Jon Hunter
2016-03-17 18:18   ` Jon Hunter
2016-03-18 10:03     ` Grygorii Strashko
2016-03-18 10:33       ` Jon Hunter
2016-03-17 14:19 ` [PATCH 07/15] irqdomain: Don't set type when mapping an IRQ Jon Hunter
2016-03-17 14:55   ` Thomas Gleixner
2016-03-17 15:06     ` Jon Hunter
2016-03-17 18:19   ` Jon Hunter
2016-03-17 14:19 ` [PATCH 08/15] genirq: Add runtime power management support for IRQ chips Jon Hunter
2016-03-17 15:02   ` Marc Zyngier
2016-03-17 15:13     ` Jon Hunter
2016-03-17 15:28       ` Marc Zyngier
2016-03-22 11:46         ` Linus Walleij
2016-03-17 15:02   ` Thomas Gleixner
2016-03-17 15:46     ` Jon Hunter
2016-03-18 11:11   ` Grygorii Strashko [this message]
2016-03-18 12:27     ` Jon Hunter
2016-03-18 14:23       ` Grygorii Strashko
2016-03-18 14:40         ` Jon Hunter
2016-03-18 14:56           ` Jon Hunter
2016-03-18 17:52             ` Grygorii Strashko
2016-03-21 10:09               ` Jon Hunter
2016-03-17 14:19 ` [PATCH 09/15] irqchip/gic: Don't initialise chip if mapping IO space fails Jon Hunter
2016-04-09 11:09   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 10/15] irqchip/gic: Remove static irq_chip definition for eoimode1 Jon Hunter
2016-03-22 11:49   ` Linus Walleij
2016-04-09 11:38   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 11/15] irqchip/gic: Return an error if GIC initialisation fails Jon Hunter
2016-04-09 11:43   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 12/15] irqchip/gic: Pass GIC pointer to save/restore functions Jon Hunter
2016-04-09 11:52   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 13/15] irqchip/gic: Prepare for adding platform driver Jon Hunter
2016-03-29 13:04   ` Geert Uytterhoeven
2016-03-29 13:59     ` Jon Hunter
2016-03-17 14:19 ` [PATCH 14/15] dt-bindings: arm-gic: Drop 'clock-names' from binding document Jon Hunter
2016-03-17 20:14   ` Rob Herring
2016-03-18  8:37     ` Jon Hunter
2016-04-12  8:54       ` Jon Hunter
2016-03-18  9:13   ` Geert Uytterhoeven
2016-03-18 10:13     ` Jon Hunter
2016-03-18 10:52       ` Geert Uytterhoeven
2016-03-18 10:56         ` Jon Hunter
2016-03-18 12:05           ` Geert Uytterhoeven
2016-03-18 12:42             ` Jon Hunter
2016-03-18 12:47             ` Grygorii Strashko
2016-03-18 13:02               ` Geert Uytterhoeven
2016-03-18 18:36                 ` Grygorii Strashko
2016-03-17 14:19 ` [PATCH 15/15] irqchip/gic: Add support for tegra AGIC interrupt controller Jon Hunter

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