[PATCH v5 0/3] arm64: tegra: Enable Tegra210 actmon for EMC scaling

[PATCH v5 0/3] arm64: tegra: Enable Tegra210 actmon for EMC scaling

[Aaron Kling via B4 Relay]

Bindings Dependencies:
- https://lore.kernel.org/r/20251021-t210-actmon-p1-v5-1-1bc8f9221917@gmail.com

Runtime/Probe Dependencies:
- https://lore.kernel.org/r/20251021-t210-actmon-p2-v5-1-a07dc70e948d@gmail.com

Logical Dependencies:
- https://lore.kernel.org/r/20251021-t210-actmon-p3-v5-1-e1ef5e93909d@gmail.com

Merge Strategy:
- Merge all patches only after all dependencies are picked up

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
Changes in v5:
- Split series
- Link to v4: https://lore.kernel.org/r/20250923-t210-actmon-v4-0-442d1eb6377c@gmail.com

Changes in v4:
- Various cleanups in patch 5 as requested by review
- Fix a couple typos in patch 4
- Link to v3: https://lore.kernel.org/r/20250906-t210-actmon-v3-0-1403365d571e@gmail.com

Changes in v3:
- In patch 5, don't fail mc probe if opp tables are missing
- Add more mc bindings to patch 1
- Add patch to use tegra210-mc bindings in the mc driver
- Re-order series to align patches within a subsystem to each other
- Link to v2: https://lore.kernel.org/r/20250903-t210-actmon-v2-0-e0d534d4f8ea@gmail.com

Changes in v2:
- Assume 64-bit dram bus width in patch 4
- Add dt-bindings patch to document the new properties on the
  tegra210-emc node.
- Link to v1: https://lore.kernel.org/r/20250828-t210-actmon-v1-0-aeb19ec1f244@gmail.com

---
Aaron Kling (3):
      arm64: tegra: tegra210: Add actmon
      arm64: tegra: Add interconnect properties to Tegra210 device-tree
      arm64: tegra: Add OPP tables on Tegra210

 .../boot/dts/nvidia/tegra210-peripherals-opp.dtsi  | 135 +++++++++++++++++++++
 arch/arm64/boot/dts/nvidia/tegra210.dtsi           |  43 +++++++
 2 files changed, 178 insertions(+)
---
base-commit: 211ddde0823f1442e4ad052a2f30f050145ccada
change-id: 20251021-t210-actmon-p4-4ddcd0f7deab

Best regards,
-- 
Aaron Kling <webgeek1234@gmail.com>

[PATCH v5 1/3] arm64: tegra: tegra210: Add actmon

[Aaron Kling via B4 Relay]

From: Aaron Kling <webgeek1234@gmail.com>

This enables the action monitor to facilitate dynamic frequency scaling.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 402b0ede1472af625d9d9e811f5af306d436cc98..6da10db893add44a98fde1666c382511212fd43c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -485,6 +485,18 @@ flow-controller@60007000 {
 		reg = <0x0 0x60007000 0x0 0x1000>;
 	};
 
+	actmon@6000c800 {
+		compatible = "nvidia,tegra210-actmon", "nvidia,tegra124-actmon";
+		reg = <0x0 0x6000c800 0x0 0x400>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&tegra_car TEGRA210_CLK_ACTMON>,
+			 <&tegra_car TEGRA210_CLK_EMC>;
+		clock-names = "actmon", "emc";
+		resets = <&tegra_car 119>;
+		reset-names = "actmon";
+		#cooling-cells = <2>;
+	};
+
 	gpio: gpio@6000d000 {
 		compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
 		reg = <0x0 0x6000d000 0x0 0x1000>;

-- 
2.51.0

[PATCH v5 2/3] arm64: tegra: Add interconnect properties to Tegra210 device-tree

[Aaron Kling via B4 Relay]

From: Aaron Kling <webgeek1234@gmail.com>

Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 6da10db893add44a98fde1666c382511212fd43c..2fcc7a28690f7100d49e8b93c4fb77de7947b002 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -202,6 +202,19 @@ dc@54200000 {
 
 			nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
 			nvidia,head = <0>;
+
+			interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
+					<&mc TEGRA210_MC_DISPLAY0B &emc>,
+					<&mc TEGRA210_MC_DISPLAY0C &emc>,
+					<&mc TEGRA210_MC_DISPLAYHC &emc>,
+					<&mc TEGRA210_MC_DISPLAYD &emc>,
+					<&mc TEGRA210_MC_DISPLAYT &emc>;
+			interconnect-names = "wina",
+					     "winb",
+					     "winc",
+					     "cursor",
+					     "wind",
+					     "wint";
 		};
 
 		dc@54240000 {
@@ -217,6 +230,15 @@ dc@54240000 {
 
 			nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
 			nvidia,head = <1>;
+
+			interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
+					<&mc TEGRA210_MC_DISPLAY0BB &emc>,
+					<&mc TEGRA210_MC_DISPLAY0CB &emc>,
+					<&mc TEGRA210_MC_DISPLAYHCB &emc>;
+			interconnect-names = "wina",
+					     "winb",
+					     "winc",
+					     "cursor";
 		};
 
 		dsia: dsi@54300000 {
@@ -990,6 +1012,7 @@ mc: memory-controller@70019000 {
 
 		#iommu-cells = <1>;
 		#reset-cells = <1>;
+		#interconnect-cells = <1>;
 	};
 
 	emc: external-memory-controller@7001b000 {
@@ -1001,6 +1024,7 @@ emc: external-memory-controller@7001b000 {
 		clock-names = "emc";
 		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 		nvidia,memory-controller = <&mc>;
+		#interconnect-cells = <0>;
 		#cooling-cells = <2>;
 	};
 

-- 
2.51.0

[PATCH v5 3/3] arm64: tegra: Add OPP tables on Tegra210

[Aaron Kling via B4 Relay]

From: Aaron Kling <webgeek1234@gmail.com>

This adds OPP tables for actmon and emc, enabling dynamic frequency
scaling for ram.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
 .../boot/dts/nvidia/tegra210-peripherals-opp.dtsi  | 135 +++++++++++++++++++++
 arch/arm64/boot/dts/nvidia/tegra210.dtsi           |   7 ++
 2 files changed, 142 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210-peripherals-opp.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-peripherals-opp.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..bf2527d737932a1f41aa83d61f44d87ba52b0519
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra210-peripherals-opp.dtsi
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+	/* EMC DVFS OPP table */
+	emc_icc_dvfs_opp_table: opp-table-dvfs0 {
+		compatible = "operating-points-v2";
+
+		opp-40800000-800 {
+			opp-microvolt = <800000 800000 1150000>;
+			opp-hz = /bits/ 64 <40800000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-68000000-800 {
+			opp-microvolt = <800000 800000 1150000>;
+			opp-hz = /bits/ 64 <68000000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-102000000-800 {
+			opp-microvolt = <800000 800000 1150000>;
+			opp-hz = /bits/ 64 <102000000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-204000000-800 {
+			opp-microvolt = <800000 800000 1150000>;
+			opp-hz = /bits/ 64 <204000000>;
+			opp-supported-hw = <0x0007>;
+			opp-suspend;
+		};
+
+		opp-408000000-812 {
+			opp-microvolt = <812000 812000 1150000>;
+			opp-hz = /bits/ 64 <408000000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-665600000-825 {
+			opp-microvolt = <825000 825000 1150000>;
+			opp-hz = /bits/ 64 <665600000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-800000000-825 {
+			opp-microvolt = <825000 825000 1150000>;
+			opp-hz = /bits/ 64 <800000000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-1065600000-837 {
+			opp-microvolt = <837000 837000 1150000>;
+			opp-hz = /bits/ 64 <1065600000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-1331200000-850 {
+			opp-microvolt = <850000 850000 1150000>;
+			opp-hz = /bits/ 64 <1331200000>;
+			opp-supported-hw = <0x0003>;
+		};
+
+		opp-1600000000-887 {
+			opp-microvolt = <887000 887000 1150000>;
+			opp-hz = /bits/ 64 <1600000000>;
+			opp-supported-hw = <0x0007>;
+		};
+	};
+
+	/* EMC bandwidth OPP table */
+	emc_bw_dfs_opp_table: opp-table-dvfs1 {
+		compatible = "operating-points-v2";
+
+		opp-40800000 {
+			opp-hz = /bits/ 64 <40800000>;
+			opp-supported-hw = <0x0003>;
+			opp-peak-kBps = <652800>;
+		};
+
+		opp-68000000 {
+			opp-hz = /bits/ 64 <68000000>;
+			opp-supported-hw = <0x0003>;
+			opp-peak-kBps = <1088000>;
+		};
+
+		opp-102000000 {
+			opp-hz = /bits/ 64 <102000000>;
+			opp-supported-hw = <0x0003>;
+			opp-peak-kBps = <1632000>;
+		};
+
+		opp-204000000 {
+			opp-hz = /bits/ 64 <204000000>;
+			opp-supported-hw = <0x0007>;
+			opp-peak-kBps = <3264000>;
+			opp-suspend;
+		};
+
+		opp-408000000 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-supported-hw = <0x0003>;
+			opp-peak-kBps = <6528000>;
+		};
+
+		opp-665600000 {
+			opp-hz = /bits/ 64 <665600000>;
+			opp-supported-hw = <0x0003>;
+			opp-peak-kBps = <10649600>;
+		};
+
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-supported-hw = <0x001F>;
+			opp-peak-kBps = <12800000>;
+		};
+
+		opp-1065600000 {
+			opp-hz = /bits/ 64 <1065600000>;
+			opp-supported-hw = <0x0003>;
+			opp-peak-kBps = <17049600>;
+		};
+
+		opp-1331200000 {
+			opp-hz = /bits/ 64 <1331200000>;
+			opp-supported-hw = <0x0003>;
+			opp-peak-kBps = <21299200>;
+		};
+
+		opp-1600000000 {
+			opp-hz = /bits/ 64 <1600000000>;
+			opp-supported-hw = <0x0007>;
+			opp-peak-kBps = <25600000>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 2fcc7a28690f7100d49e8b93c4fb77de7947b002..f2961c9e12db1cf91254b75389779955f2a0956d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -9,6 +9,8 @@
 #include <dt-bindings/thermal/tegra124-soctherm.h>
 #include <dt-bindings/soc/tegra-pmc.h>
 
+#include "tegra210-peripherals-opp.dtsi"
+
 / {
 	compatible = "nvidia,tegra210";
 	interrupt-parent = <&lic>;
@@ -516,6 +518,9 @@ actmon@6000c800 {
 		clock-names = "actmon", "emc";
 		resets = <&tegra_car 119>;
 		reset-names = "actmon";
+		operating-points-v2 = <&emc_bw_dfs_opp_table>;
+		interconnects = <&mc TEGRA210_MC_MPCORER &emc>;
+		interconnect-names = "cpu-read";
 		#cooling-cells = <2>;
 	};
 
@@ -1024,6 +1029,8 @@ emc: external-memory-controller@7001b000 {
 		clock-names = "emc";
 		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 		nvidia,memory-controller = <&mc>;
+		operating-points-v2 = <&emc_icc_dvfs_opp_table>;
+
 		#interconnect-cells = <0>;
 		#cooling-cells = <2>;
 	};

-- 
2.51.0

Re: [PATCH v5 2/3] arm64: tegra: Add interconnect properties to Tegra210 device-tree

[Jon Hunter]

On 22/10/2025 04:13, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling <webgeek1234@gmail.com>
> 
> Add interconnect properties to the Memory Controller, External Memory
> Controller and the Display Controller nodes in order to describe hardware
> interconnection.
> 
> Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> ---
>   arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> index 6da10db893add44a98fde1666c382511212fd43c..2fcc7a28690f7100d49e8b93c4fb77de7947b002 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> @@ -202,6 +202,19 @@ dc@54200000 {
>   
>   			nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
>   			nvidia,head = <0>;
> +
> +			interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
> +					<&mc TEGRA210_MC_DISPLAY0B &emc>,
> +					<&mc TEGRA210_MC_DISPLAY0C &emc>,
> +					<&mc TEGRA210_MC_DISPLAYHC &emc>,
> +					<&mc TEGRA210_MC_DISPLAYD &emc>,
> +					<&mc TEGRA210_MC_DISPLAYT &emc>;
> +			interconnect-names = "wina",
> +					     "winb",
> +					     "winc",
> +					     "cursor",
> +					     "wind",
> +					     "wint";
>   		};
>   
>   		dc@54240000 {
> @@ -217,6 +230,15 @@ dc@54240000 {
>   
>   			nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
>   			nvidia,head = <1>;
> +
> +			interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
> +					<&mc TEGRA210_MC_DISPLAY0BB &emc>,
> +					<&mc TEGRA210_MC_DISPLAY0CB &emc>,
> +					<&mc TEGRA210_MC_DISPLAYHCB &emc>;
> +			interconnect-names = "wina",
> +					     "winb",
> +					     "winc",
> +					     "cursor";
>   		};
>   
>   		dsia: dsi@54300000 {
> @@ -990,6 +1012,7 @@ mc: memory-controller@70019000 {
>   
>   		#iommu-cells = <1>;
>   		#reset-cells = <1>;
> +		#interconnect-cells = <1>;
>   	};
>   
>   	emc: external-memory-controller@7001b000 {
> @@ -1001,6 +1024,7 @@ emc: external-memory-controller@7001b000 {
>   		clock-names = "emc";
>   		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
>   		nvidia,memory-controller = <&mc>;
> +		#interconnect-cells = <0>;
>   		#cooling-cells = <2>;
>   	};


I am seeing another failure on -next for Tegra210 and bisect is point to 
this commit ...

# first bad commit: [3cad4369399a31277e9e20de723c665b30cba574] arm64: 
tegra: Add interconnect properties for Tegra210

The tegra-tests [0] devices test is failing and after this commit the 
DRM device is no longer bound to the driver.

Jon

[0] https://github.com/thierryreding/tegra-tests
-- 
nvpublic

Re: [PATCH v5 2/3] arm64: tegra: Add interconnect properties to Tegra210 device-tree

[Aaron Kling]

On Fri, Nov 21, 2025 at 5:24 AM Jon Hunter <jonathanh@nvidia.com> wrote:
>
>
> On 22/10/2025 04:13, Aaron Kling via B4 Relay wrote:
> > From: Aaron Kling <webgeek1234@gmail.com>
> >
> > Add interconnect properties to the Memory Controller, External Memory
> > Controller and the Display Controller nodes in order to describe hardware
> > interconnection.
> >
> > Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> > ---
> >   arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++
> >   1 file changed, 24 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> > index 6da10db893add44a98fde1666c382511212fd43c..2fcc7a28690f7100d49e8b93c4fb77de7947b002 100644
> > --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> > +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> > @@ -202,6 +202,19 @@ dc@54200000 {
> >
> >                       nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
> >                       nvidia,head = <0>;
> > +
> > +                     interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAY0B &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAY0C &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAYHC &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAYD &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAYT &emc>;
> > +                     interconnect-names = "wina",
> > +                                          "winb",
> > +                                          "winc",
> > +                                          "cursor",
> > +                                          "wind",
> > +                                          "wint";
> >               };
> >
> >               dc@54240000 {
> > @@ -217,6 +230,15 @@ dc@54240000 {
> >
> >                       nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
> >                       nvidia,head = <1>;
> > +
> > +                     interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAY0BB &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAY0CB &emc>,
> > +                                     <&mc TEGRA210_MC_DISPLAYHCB &emc>;
> > +                     interconnect-names = "wina",
> > +                                          "winb",
> > +                                          "winc",
> > +                                          "cursor";
> >               };
> >
> >               dsia: dsi@54300000 {
> > @@ -990,6 +1012,7 @@ mc: memory-controller@70019000 {
> >
> >               #iommu-cells = <1>;
> >               #reset-cells = <1>;
> > +             #interconnect-cells = <1>;
> >       };
> >
> >       emc: external-memory-controller@7001b000 {
> > @@ -1001,6 +1024,7 @@ emc: external-memory-controller@7001b000 {
> >               clock-names = "emc";
> >               interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
> >               nvidia,memory-controller = <&mc>;
> > +             #interconnect-cells = <0>;
> >               #cooling-cells = <2>;
> >       };
>
>
> I am seeing another failure on -next for Tegra210 and bisect is point to
> this commit ...
>
> # first bad commit: [3cad4369399a31277e9e20de723c665b30cba574] arm64:
> tegra: Add interconnect properties for Tegra210
>
> The tegra-tests [0] devices test is failing and after this commit the
> DRM device is no longer bound to the driver.

Upon research, this one appears to be a bit more complicated. The dc
code in tegra-drm sets up an icc connection per plane to emc, I
presume in order to prevent underruns. If the icc path exists in the
dt, but the emc driver has not added itself to icc, then dc will
infinitely defer [0]. And per earlier statements on this list, the
regression test setup for Tegra210 does not pass emc training data
from the bootloader to the kernel, meaning the emc driver fails to
probe.

I am not sure how to handle this. As far as I know, the previous archs
that the dc icc code was originally written for wouldn't ever have the
emc driver fail, because the untrained tables are in the kernel dt,
meaning that the driver could at least load that. On Tegra210 since
the dt tables were rejected, there's nothing for the driver to fall
back on, so it is possible to have a hard failure.

Does anyone have ideas on how to handle this? To allow dc to report
icc bw on Tegra210, but not fail probe if the emc is missing? Making
the icc path lookup non-fatal isn't really an option.

Aaron

[0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/tegra/plane.c?h=v6.18-rc6#n778

Re: [PATCH v5 2/3] arm64: tegra: Add interconnect properties to Tegra210 device-tree

[Aaron Kling]

On Fri, Nov 21, 2025 at 1:32 PM Aaron Kling <webgeek1234@gmail.com> wrote:
>
> On Fri, Nov 21, 2025 at 5:24 AM Jon Hunter <jonathanh@nvidia.com> wrote:
> >
> >
> > On 22/10/2025 04:13, Aaron Kling via B4 Relay wrote:
> > > From: Aaron Kling <webgeek1234@gmail.com>
> > >
> > > Add interconnect properties to the Memory Controller, External Memory
> > > Controller and the Display Controller nodes in order to describe hardware
> > > interconnection.
> > >
> > > Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> > > ---
> > >   arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++
> > >   1 file changed, 24 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> > > index 6da10db893add44a98fde1666c382511212fd43c..2fcc7a28690f7100d49e8b93c4fb77de7947b002 100644
> > > --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> > > +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> > > @@ -202,6 +202,19 @@ dc@54200000 {
> > >
> > >                       nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
> > >                       nvidia,head = <0>;
> > > +
> > > +                     interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAY0B &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAY0C &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAYHC &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAYD &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAYT &emc>;
> > > +                     interconnect-names = "wina",
> > > +                                          "winb",
> > > +                                          "winc",
> > > +                                          "cursor",
> > > +                                          "wind",
> > > +                                          "wint";
> > >               };
> > >
> > >               dc@54240000 {
> > > @@ -217,6 +230,15 @@ dc@54240000 {
> > >
> > >                       nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
> > >                       nvidia,head = <1>;
> > > +
> > > +                     interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAY0BB &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAY0CB &emc>,
> > > +                                     <&mc TEGRA210_MC_DISPLAYHCB &emc>;
> > > +                     interconnect-names = "wina",
> > > +                                          "winb",
> > > +                                          "winc",
> > > +                                          "cursor";
> > >               };
> > >
> > >               dsia: dsi@54300000 {
> > > @@ -990,6 +1012,7 @@ mc: memory-controller@70019000 {
> > >
> > >               #iommu-cells = <1>;
> > >               #reset-cells = <1>;
> > > +             #interconnect-cells = <1>;
> > >       };
> > >
> > >       emc: external-memory-controller@7001b000 {
> > > @@ -1001,6 +1024,7 @@ emc: external-memory-controller@7001b000 {
> > >               clock-names = "emc";
> > >               interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
> > >               nvidia,memory-controller = <&mc>;
> > > +             #interconnect-cells = <0>;
> > >               #cooling-cells = <2>;
> > >       };
> >
> >
> > I am seeing another failure on -next for Tegra210 and bisect is point to
> > this commit ...
> >
> > # first bad commit: [3cad4369399a31277e9e20de723c665b30cba574] arm64:
> > tegra: Add interconnect properties for Tegra210
> >
> > The tegra-tests [0] devices test is failing and after this commit the
> > DRM device is no longer bound to the driver.
>
> Upon research, this one appears to be a bit more complicated. The dc
> code in tegra-drm sets up an icc connection per plane to emc, I
> presume in order to prevent underruns. If the icc path exists in the
> dt, but the emc driver has not added itself to icc, then dc will
> infinitely defer [0]. And per earlier statements on this list, the
> regression test setup for Tegra210 does not pass emc training data
> from the bootloader to the kernel, meaning the emc driver fails to
> probe.
>
> I am not sure how to handle this. As far as I know, the previous archs
> that the dc icc code was originally written for wouldn't ever have the
> emc driver fail, because the untrained tables are in the kernel dt,
> meaning that the driver could at least load that. On Tegra210 since
> the dt tables were rejected, there's nothing for the driver to fall
> back on, so it is possible to have a hard failure.
>
> Does anyone have ideas on how to handle this? To allow dc to report
> icc bw on Tegra210, but not fail probe if the emc is missing? Making
> the icc path lookup non-fatal isn't really an option.
>
> Aaron
>
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/tegra/plane.c?h=v6.18-rc6#n778

Are there any further thoughts on this patch? I would like to get this
requeued as soon as possible.

Aaron