Re: [PATCH] clk: qcom: enable ALWAYS_ON for titan_top_gdsc

[Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>]

On 6/26/2026 10:02 PM, Konrad Dybcio wrote:
> On 6/26/26 6:26 PM, Brian Masney wrote:
>> With the introduction of sync_state support in the clk and pmdomain
>> subsystems, the following warning happens when the unused clocks are
>> shutdown in camcc-sc8280xp:
> 
> Stuck at _on_ sounds wrong.. does clk_ignore_unused / removing
> the sync state from the clock part only resolve this? There may
> be a clock dependency for the TITAN_TOP_GDSC that we're failing to
> describe
> 

Hi Brian,

This probably could be due to camcc_gdsc_clk getting turned OFF during the
sync_state, but this clk is required for GDSC transitions. The camcc_gdsc_clk
is currently kept always ON from probe in camcc-sc8280xp, but the clock is
also modeled with clock framework, so the clock can get disabled in sync_state
callback now.

Can you please try removing the modelling of camcc_gdsc_clk using below diff
and see if helps here?


diff --git a/drivers/clk/qcom/camcc-sc8280xp.c b/drivers/clk/qcom/camcc-sc8280xp.c
index e97b8d4f3c84..660d8655d391 100644
--- a/drivers/clk/qcom/camcc-sc8280xp.c
+++ b/drivers/clk/qcom/camcc-sc8280xp.c
@@ -1753,24 +1753,6 @@ static struct clk_branch camcc_csiphy3_clk = {
        },
 };

-static struct clk_branch camcc_gdsc_clk = {
-       .halt_reg = 0xc1e4,
-       .halt_check = BRANCH_HALT,
-       .clkr = {
-               .enable_reg = 0xc1e4,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "camcc_gdsc_clk",
-                       .parent_hws = (const struct clk_hw*[]){
-                               &camcc_xo_clk_src.clkr.hw,
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
 static struct clk_branch camcc_icp_ahb_clk = {
        .halt_reg = 0xc0d8,
        .halt_check = BRANCH_HALT,
@@ -2839,7 +2821,6 @@ static struct clk_regmap *camcc_sc8280xp_clocks[] = {
        [CAMCC_CSIPHY2_CLK] = &camcc_csiphy2_clk.clkr,
        [CAMCC_CSIPHY3_CLK] = &camcc_csiphy3_clk.clkr,
        [CAMCC_FAST_AHB_CLK_SRC] = &camcc_fast_ahb_clk_src.clkr,
-       [CAMCC_GDSC_CLK] = &camcc_gdsc_clk.clkr,
        [CAMCC_ICP_AHB_CLK] = &camcc_icp_ahb_clk.clkr,
        [CAMCC_ICP_CLK] = &camcc_icp_clk.clkr,
        [CAMCC_ICP_CLK_SRC] = &camcc_icp_clk_src.clkr,


Thanks,
Jagadeesh