Re: [PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN

["Nuno Sá" <noname.nuno@gmail.com>]

On Wed, 2024-10-09 at 16:11 -0500, David Lechner wrote:
> When using the axi-pwmgen as a trigger for ADCs, we've found that the
> default behavior of the PWMGEN IP block is not ideal. The default
> behavior is to wait for the period of all PWM outputs to run out before
> applying any new settings. But there isn't a way to block until this
> happens (and even if there was, it could take a long time). So the
> pwm apply function returns before the new settings are actually applied.
> 
> This makes certain use cases impossible. For example, to use the PWM
> like a GPIO to create a single pulse on and off to trigger a single ADC
> conversion.
> 
> The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the
> behavior so that any new output settings (period, duty cycle, etc.) are
> applied immediately. This can cause glitches in the output, but makes
> the PWM actually useable for most applications.
> 
> Also, there was a naming conflict with register names, so there is a
> preliminary cleanup patch to sort that out.
> 
> ---

Reviewed-by: Nuno Sa <nuno.sa@analog.com>

> David Lechner (2):
>       pwm: axi-pwmgen: rename 0x10 register
>       pwm: axi-pwmgen: enable FORCE_ALIGN by default
> 
>  drivers/pwm/pwm-axi-pwmgen.c | 24 ++++++++++++++++++------
>  1 file changed, 18 insertions(+), 6 deletions(-)
> ---
> base-commit: ff25451372ee1aa4c4f4401dc96516782a00dd4d
> change-id: 20241009-pwm-axi-pwmgen-enable-force_align-cfb403da4612
> 
> Best regards,