From: Graham Whyte <grwhyte@linux.microsoft.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: Niklas Cassel <cassel@kernel.org>,
linux-pci@vger.kernel.org, shyamsaini@linux.microsoft.com,
code@tyhicks.com, Okaya@kernel.org, bhelgaas@google.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/2] PCI: Reduce FLR delay to 10ms for MSFT devices
Date: Thu, 12 Jun 2025 09:41:45 -0700 [thread overview]
Message-ID: <57ad1095-89ba-4044-91ce-1ab37bcc79dd@linux.microsoft.com> (raw)
In-Reply-To: <aEp0N2RNh1szW1Xy@infradead.org>
On 6/11/2025 11:31 PM, Christoph Hellwig wrote:
> On Wed, Jun 11, 2025 at 01:08:21PM -0700, Graham Whyte wrote:
>> We can ask our HW engineers to implement function readiness but we need
>> to be able to support exiting products, hence why posting it as a quirk.
>
> Your report sounds like it works perfectly fine, it's just that you
> want to reduce the delay. For that you'll need to stick to the standard
> methods instead of adding quirks, which are for buggy hardware that does
> not otherwise work.
Bjorn, what would you recommend as next steps here?
next prev parent reply other threads:[~2025-06-12 16:41 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-11 0:05 grwhyte
2025-06-11 0:05 ` [PATCH v3 1/2] PCI: Add flr_delay parameter to pci_dev struct grwhyte
2025-06-13 10:23 ` Ilpo Järvinen
2025-08-06 22:06 ` Bjorn Helgaas
2025-06-11 0:05 ` [PATCH v3 2/2] PCI: Reduce FLR delay to 10ms for MSFT devices grwhyte
2025-06-13 10:31 ` Ilpo Järvinen
2025-06-11 3:27 ` [PATCH v3 0/2] " Christoph Hellwig
2025-06-11 7:23 ` Niklas Cassel
2025-06-11 20:08 ` Graham Whyte
2025-06-12 6:31 ` Christoph Hellwig
2025-06-12 16:41 ` Graham Whyte [this message]
2025-06-13 15:33 ` Bjorn Helgaas
2025-06-16 19:02 ` Graham Whyte
2025-06-16 21:05 ` Bjorn Helgaas
2025-06-18 16:42 ` Graham Whyte
2025-07-02 17:03 ` Graham Whyte
2025-06-13 11:42 ` Manivannan Sadhasivam
2025-06-13 13:45 ` Lukas Wunner
2025-06-13 13:56 ` Manivannan Sadhasivam
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