From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: grwhyte@linux.microsoft.com
Cc: linux-pci@vger.kernel.org, shyamsaini@linux.microsoft.com,
code@tyhicks.com, Okaya@kernel.org, bhelgaas@google.com,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/2] PCI: Add flr_delay parameter to pci_dev struct
Date: Fri, 13 Jun 2025 13:23:03 +0300 (EEST) [thread overview]
Message-ID: <7b66aaa6-10af-885f-a8f2-040f899197f1@linux.intel.com> (raw)
In-Reply-To: <20250611000552.1989795-2-grwhyte@linux.microsoft.com>
On Wed, 11 Jun 2025, grwhyte@linux.microsoft.com wrote:
> From: Graham Whyte <grwhyte@linux.microsoft.com>
>
> Add a new flr_delay member of the pci_dev struct to allow customization of
> the delay after FLR for devices that do not support immediate readiness.
>
> Signed-off-by: Graham Whyte <grwhyte@linux.microsoft.com>
> ---
> drivers/pci/pci.c | 8 ++++++--
> drivers/pci/pci.h | 2 ++
> include/linux/pci.h | 1 +
> 3 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index e9448d55113b..04f2660df7c4 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -3233,6 +3233,8 @@ void pci_pm_init(struct pci_dev *dev)
> dev->bridge_d3 = pci_bridge_d3_possible(dev);
> dev->d3cold_allowed = true;
>
> + dev->flr_delay = PCI_FLR_DELAY;
> +
> dev->d1_support = false;
> dev->d2_support = false;
> if (!pci_no_d1d2(dev)) {
> @@ -4529,9 +4531,11 @@ int pcie_flr(struct pci_dev *dev)
> /*
> * Per PCIe r4.0, sec 6.6.2, a device must complete an FLR within
> * 100ms, but may silently discard requests while the FLR is in
> - * progress. Wait 100ms before trying to access the device.
> + * progress. Wait 100ms before trying to access the device, unless
> + * otherwise modified if the device supports a faster reset.
> + * Use usleep_range to support delays under 20ms.
> */
> - msleep(100);
> + usleep_range(dev->flr_delay, dev->flr_delay+1);
Missing spaces around +.
Are you sure + 1us is really useful as the range? Usually much bigger
numbers are used.
There's also fsleep() which would autoselect the sleep mechanism.
> return pci_dev_wait(dev, "FLR", PCIE_RESET_READY_POLL_MS);
> }
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index 12215ee72afb..abc1cf6e6d9b 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -135,6 +135,8 @@ struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev,
> #define PCI_PM_D3HOT_WAIT 10 /* msec */
> #define PCI_PM_D3COLD_WAIT 100 /* msec */
>
> +#define PCI_FLR_DELAY 100000 /* usec */
Please put the unit into the define name (_US).
> +
> void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
> void pci_refresh_power_state(struct pci_dev *dev);
> int pci_power_up(struct pci_dev *dev);
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 05e68f35f392..4c9989037ed1 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -402,6 +402,7 @@ struct pci_dev {
> bit manually */
> unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */
> unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
> + unsigned int flr_delay; /* pci post flr sleep time in us */
Please follow how the spec writes things in capitalization of letters.
>
> u16 l1ss; /* L1SS Capability pointer */
> #ifdef CONFIG_PCIEASPM
>
--
i.
next prev parent reply other threads:[~2025-06-13 10:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-11 0:05 [PATCH v3 0/2] PCI: Reduce FLR delay to 10ms for MSFT devices grwhyte
2025-06-11 0:05 ` [PATCH v3 1/2] PCI: Add flr_delay parameter to pci_dev struct grwhyte
2025-06-13 10:23 ` Ilpo Järvinen [this message]
2025-08-06 22:06 ` Bjorn Helgaas
2025-06-11 0:05 ` [PATCH v3 2/2] PCI: Reduce FLR delay to 10ms for MSFT devices grwhyte
2025-06-13 10:31 ` Ilpo Järvinen
2025-06-11 3:27 ` [PATCH v3 0/2] " Christoph Hellwig
2025-06-11 7:23 ` Niklas Cassel
2025-06-11 20:08 ` Graham Whyte
2025-06-12 6:31 ` Christoph Hellwig
2025-06-12 16:41 ` Graham Whyte
2025-06-13 15:33 ` Bjorn Helgaas
2025-06-16 19:02 ` Graham Whyte
2025-06-16 21:05 ` Bjorn Helgaas
2025-06-18 16:42 ` Graham Whyte
2025-07-02 17:03 ` Graham Whyte
2025-06-13 11:42 ` Manivannan Sadhasivam
2025-06-13 13:45 ` Lukas Wunner
2025-06-13 13:56 ` Manivannan Sadhasivam
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