Re: [PATCH 2/5] arm64: dts: qcom: Add Kalambo SoC

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 7/18/26 2:06 PM, Gopikrishna Garmidi wrote:
> Introduce support for the Qualcomm Kalambo SoC. It is derived from Mahua
> with CPU cluster 0 removed, leaving it with just cluster 1. As a result,
> the PDP mailbox and SCP low-priority register windows are updated to
> match the reduced CPU complex. Everything else should work as-is.
> 
> Add a label to the Glymur cluster0 cpu-map node to allow its removal on
> derived SoCs.
> 
> Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/glymur.dtsi  |  2 +-
>  arch/arm64/boot/dts/qcom/kalambo.dtsi | 29 +++++++++++++++++++++++++++++
>  2 files changed, 30 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index 55d91c696a3a..f2feef362be5 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> @@ -275,7 +275,7 @@ cpu17: cpu@20500 {
>  		};
>  
>  		cpu-map {
> -			cluster0 {
> +			cpu_map_cluster0: cluster0 {

I doubt the code that parses this will be happy about not
being able to start from 'cluster0'



[...]

> +&pdp0_mbox {
> +	reg = <0 0x17610000 0 0x8000>, <0 0x1a980000 0 0x8000>;
> +};

Are you sure about this change?

> +&cpu_scp_lpri1 {
> +	reg = <0x180 0x60>;
> +};

This is specific to old firmware, at least it was on Glymur, I believe..

Konrad