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From: Harry Wentland <hwentlan@amd.com>
To: "Siqueira, Rodrigo" <Rodrigo.Siqueira@amd.com>,
	"Wentland, Harry" <Harry.Wentland@amd.com>,
	"Li, Sun peng (Leo)" <Sunpeng.Li@amd.com>,
	"Deucher, Alexander" <Alexander.Deucher@amd.com>,
	"Cornij, Nikola" <Nikola.Cornij@amd.com>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Manasi Navare" <manasi.d.navare@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rodrigo Siqueira" <rodrigosiqueiramelo@gmail.com>
Cc: "dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm: Fix DSC throughput mode 0 mask definition
Date: Mon, 21 Oct 2019 15:35:36 +0000	[thread overview]
Message-ID: <584f5292-c177-34d8-8e2f-0e6661a87f23@amd.com> (raw)
In-Reply-To: <20191021150345.igdye4kv35nsk4ox@outlook.office365.com>


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On 2019-10-21 11:03 a.m., Siqueira, Rodrigo wrote:
> Commit d7cd0e05 introduced a change at DP_DSC_THROUGHPUT_MODE_0_170
> which is not aligned with the spec. This commit replace 15 << 4 by
> 15 << 0 for DP_DSC_THROUGHPUT_MODE_0_170 in order to make it follow the
> specification.
> 
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Leo Li <sunpeng.li@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Nikola Cornij <nikola.cornij@amd.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Fixes: d7cd0e053b1 (drm/amd/display: Add 170Mpix/sec DSC throughput support)
> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>

Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Harry

> ---
>  include/drm/drm_dp_helper.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index cfadeeef8492..52024049c59e 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -306,7 +306,7 @@
>  # define DP_DSC_THROUGHPUT_MODE_0_900       (12 << 0)
>  # define DP_DSC_THROUGHPUT_MODE_0_950       (13 << 0)
>  # define DP_DSC_THROUGHPUT_MODE_0_1000      (14 << 0)
> -# define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 4)
> +# define DP_DSC_THROUGHPUT_MODE_0_170       (15 << 0) /* 1.4a */
>  # define DP_DSC_THROUGHPUT_MODE_1_MASK      (0xf << 4)
>  # define DP_DSC_THROUGHPUT_MODE_1_SHIFT     4
>  # define DP_DSC_THROUGHPUT_MODE_1_UPSUPPORTED 0
> 


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      reply	other threads:[~2019-10-21 15:36 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-21 15:03 Siqueira, Rodrigo
2019-10-21 15:35 ` Harry Wentland [this message]

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