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From: Paolo Bonzini <pbonzini@redhat.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	yang.zhang.wz@gmail.com, feng.wu@intel.com, rkrcmar@redhat.com
Subject: Re: [PATCH 2/3] kvm: x86: do not use KVM_REQ_EVENT for APICv interrupt injection
Date: Wed, 28 Sep 2016 16:08:02 +0200	[thread overview]
Message-ID: <585ea3be-3256-ce78-0653-b0fdb3e8f1ad@redhat.com> (raw)
In-Reply-To: <20160928164054-mutt-send-email-mst@kernel.org>



On 28/09/2016 15:46, Michael S. Tsirkin wrote:
> On Wed, Sep 28, 2016 at 10:21:41AM +0200, Paolo Bonzini wrote:
>> Basically the order for interrupt injection is:
>>
>> (1)	set PIR
>> 	smp_wmb()
> 
> Empty on x86 btw but good for reasoning about barrier
> pairing. So - where's the paired smp_rmb? See below.
> 
>> (2)	set ON
>> 	smp_mb()
> 
> This one can be combined to smp_store_mb to save
> a couple of cycles.

Yeah, this was very much a pseudo-code view.  In reality it's a
test_and_set_bit().  If ON=1 already there's no need to go on with 3/4.

>> (3)	read vcpu->mode
>> 	if IN_GUEST_MODE
>> (4a)		send posted interrupt IPI
>> 	else
>> (4b)		kick (i.e. cmpxchg vcpu->mode from IN_GUEST_MODE to
>> 		      EXITING_GUEST_MODE and send reschedule IPI)
>>
>> while the order for entering the guest must be the opposite.  The
>> numbers on the left identify the pairing between interrupt injection and
>> vcpu_entr_guest
>>
>> (4a)	enable posted interrupt processing (i.e. disable interrupts!)
>> (3)	set vcpu->mode to IN_GUEST_MODE
>> 	smp_mb()
> 
> This one can be combined to smp_store_mb to save
> a couple of cycles.

Here the actual code has smp_mb__after_srcu_unlock.

>> (2)	read ON
>> 	if ON then
> 
> do we need smp_rmb here?

Yes, we have test_and_clear here which has an implicit barrier.

Paolo

> 
>> (1)		read PIR
>> 		sync PIR to IRR
>> (4b)	read vcpu->mode
>> 	if vcpu->mode == EXITING_GUEST_MODE then
>> 		cancel vmentry
>> (3/2/1)		# posted interrupts are processed on the next vmentry
>>
>> Paolo

  reply	other threads:[~2016-09-28 14:08 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-27 21:20 [RFC PATCH 0/3] kvm: x86: speedups for APICv Paolo Bonzini
2016-09-27 21:20 ` [PATCH 1/3] kvm: x86: avoid atomic operations on APICv vmentry Paolo Bonzini
2016-09-27 21:20 ` [PATCH 2/3] kvm: x86: do not use KVM_REQ_EVENT for APICv interrupt injection Paolo Bonzini
2016-09-27 23:07   ` Michael S. Tsirkin
2016-09-28  8:21     ` Paolo Bonzini
2016-09-28 11:40       ` Wu, Feng
2016-09-28 11:50         ` Paolo Bonzini
2016-09-28 12:06           ` Wu, Feng
2016-09-28 12:14             ` Paolo Bonzini
2016-10-14  7:37           ` Yang Zhang
2016-10-14  8:12             ` Paolo Bonzini
2016-09-28 13:46       ` Michael S. Tsirkin
2016-09-28 14:08         ` Paolo Bonzini [this message]
2016-09-28 10:04   ` Wu, Feng
2016-09-28 10:16     ` Paolo Bonzini
2016-09-28 11:53       ` Wu, Feng
2016-09-28 11:55         ` Paolo Bonzini
2016-09-28 12:07           ` Wu, Feng
2016-10-14  7:12   ` Yang Zhang
2016-09-27 21:20 ` [PATCH 3/3] KVM: x86: do not scan IRR twice on APICv vmentry Paolo Bonzini
2016-09-28 14:00   ` Michael S. Tsirkin
2016-09-28 14:44     ` Paolo Bonzini
2016-09-29  2:51   ` Wu, Feng
2016-10-14  7:32   ` Yang Zhang
2016-10-14  7:45     ` Paolo Bonzini
2016-09-29 19:55 ` [RFC PATCH 0/3] kvm: x86: speedups for APICv Radim Krčmář
2016-09-29 21:41   ` Paolo Bonzini
2016-09-30 13:23     ` Radim Krčmář
2016-09-30 13:33     ` Radim Krčmář

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