* [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290
@ 2025-11-19 13:47 Horatiu Vultur
2025-11-19 19:38 ` Andrew Lunn
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Horatiu Vultur @ 2025-11-19 13:47 UTC (permalink / raw)
To: nicolas.ferre, alexandre.belloni, claudiu.beznea, robh, krzk+dt,
conor+dt
Cc: linux-arm-kernel, devicetree, linux-kernel, Horatiu Vultur
The problem is that the MDIO controller can't detect any of the PHYs.
The reason is that the lan966x is not pulling high the GPIO 53 that is
connected to the PHYs reset GPIO. Without doing this the PHYs are kept
in reset. The mdio controller framework has the possiblity to control a
GPIO to release the reset of the PHYs. So take advantage of this and set
line to be high before accessing the PHYs.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
arch/arm/boot/dts/microchip/lan966x-pcb8290.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
index 3b7577e48b467..50bd29572f3ed 100644
--- a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
+++ b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
@@ -54,6 +54,7 @@ udc_pins: ucd-pins {
&mdio0 {
pinctrl-0 = <&miim_a_pins>;
pinctrl-names = "default";
+ reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
status = "okay";
ext_phy0: ethernet-phy@7 {
--
2.34.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290
2025-11-19 13:47 [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290 Horatiu Vultur
@ 2025-11-19 19:38 ` Andrew Lunn
2025-12-06 11:03 ` Claudiu Beznea
2026-01-08 7:15 ` claudiu beznea
2 siblings, 0 replies; 4+ messages in thread
From: Andrew Lunn @ 2025-11-19 19:38 UTC (permalink / raw)
To: Horatiu Vultur
Cc: nicolas.ferre, alexandre.belloni, claudiu.beznea, robh, krzk+dt,
conor+dt, linux-arm-kernel, devicetree, linux-kernel
On Wed, Nov 19, 2025 at 02:47:50PM +0100, Horatiu Vultur wrote:
> The problem is that the MDIO controller can't detect any of the PHYs.
> The reason is that the lan966x is not pulling high the GPIO 53 that is
> connected to the PHYs reset GPIO. Without doing this the PHYs are kept
> in reset. The mdio controller framework has the possiblity to control a
> GPIO to release the reset of the PHYs. So take advantage of this and set
> line to be high before accessing the PHYs.
>
> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290
2025-11-19 13:47 [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290 Horatiu Vultur
2025-11-19 19:38 ` Andrew Lunn
@ 2025-12-06 11:03 ` Claudiu Beznea
2026-01-08 7:15 ` claudiu beznea
2 siblings, 0 replies; 4+ messages in thread
From: Claudiu Beznea @ 2025-12-06 11:03 UTC (permalink / raw)
To: Horatiu Vultur, nicolas.ferre, alexandre.belloni, robh, krzk+dt,
conor+dt
Cc: linux-arm-kernel, devicetree, linux-kernel
On 11/19/25 15:47, Horatiu Vultur wrote:
> The problem is that the MDIO controller can't detect any of the PHYs.
> The reason is that the lan966x is not pulling high the GPIO 53 that is
> connected to the PHYs reset GPIO. Without doing this the PHYs are kept
> in reset. The mdio controller framework has the possiblity to control a
s/possiblity/possibility
I can adjust it while applying
> GPIO to release the reset of the PHYs. So take advantage of this and set
> line to be high before accessing the PHYs.
>
> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> ---
> arch/arm/boot/dts/microchip/lan966x-pcb8290.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
> index 3b7577e48b467..50bd29572f3ed 100644
> --- a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
> +++ b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
> @@ -54,6 +54,7 @@ udc_pins: ucd-pins {
> &mdio0 {
> pinctrl-0 = <&miim_a_pins>;
> pinctrl-names = "default";
> + reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
> status = "okay";
>
> ext_phy0: ethernet-phy@7 {
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290
2025-11-19 13:47 [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290 Horatiu Vultur
2025-11-19 19:38 ` Andrew Lunn
2025-12-06 11:03 ` Claudiu Beznea
@ 2026-01-08 7:15 ` claudiu beznea
2 siblings, 0 replies; 4+ messages in thread
From: claudiu beznea @ 2026-01-08 7:15 UTC (permalink / raw)
To: Horatiu Vultur, nicolas.ferre, alexandre.belloni, robh, krzk+dt,
conor+dt
Cc: linux-arm-kernel, devicetree, linux-kernel
On 11/19/25 15:47, Horatiu Vultur wrote:
> The problem is that the MDIO controller can't detect any of the PHYs.
> The reason is that the lan966x is not pulling high the GPIO 53 that is
> connected to the PHYs reset GPIO. Without doing this the PHYs are kept
> in reset. The mdio controller framework has the possiblity to control a
> GPIO to release the reset of the PHYs. So take advantage of this and set
> line to be high before accessing the PHYs.
>
> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Applied to at91-fixes, thanks!
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-01-08 7:15 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2025-11-19 13:47 [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290 Horatiu Vultur
2025-11-19 19:38 ` Andrew Lunn
2025-12-06 11:03 ` Claudiu Beznea
2026-01-08 7:15 ` claudiu beznea
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