From: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
To: Stephen Boyd <swboyd@chromium.org>, <agross@kernel.org>,
<bjorn.andersson@linaro.org>, <devicetree@vger.kernel.org>,
<dianders@chromium.org>, <judyhsiao@chromium.org>,
<linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<robh+dt@kernel.org>, <srinivas.kandagatla@linaro.org>
Cc: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Subject: Re: [PATCH v5 3/3] arm64: dts: qcom: sc7280: add lpass lpi pin controller node
Date: Tue, 5 Apr 2022 10:35:03 +0530 [thread overview]
Message-ID: <5d2f23a5-e8a9-6be1-cc91-0a80bad68f3a@quicinc.com> (raw)
In-Reply-To: <CAE-0n50xoWpd8S82W=xjbKBjqD-bgyMM8b539PV83=fHBQC7yw@mail.gmail.com>
On 3/22/2022 1:56 AM, Stephen Boyd wrote:
> Quoting Srinivasa Rao Mandadapu (2022-03-21 04:59:19)
>> Add LPASS LPI pinctrl node required for Audio functionality on sc7280
>> based platforms.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 147 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 147 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 8d8cec5..499299a 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -1987,6 +1987,153 @@
>> qcom,bcm-voters = <&apps_bcm_voter>;
>> };
>>
>> + lpass_tlmm: pinctrl@33c0000 {
>> + compatible = "qcom,sc7280-lpass-lpi-pinctrl";
>> + reg = <0 0x33c0000 0x0 0x20000>,
>> + <0 0x3550000 0x0 0x10000>;
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&lpass_tlmm 0 0 15>;
>> +
>> + #clock-cells = <1>;
>> +
>> + dmic01_active: dmic01-active {
>> + clk {
>> + pins = "gpio6";
>> + function = "dmic1_clk";
>> + drive-strength = <8>;
>> + output-high;
> The rule of thumb is that drive strength, output/input, and bias
> properties should be in the board file, because the board layout decides
> the drive strength, the output level could be inverted on the board, and
> the biasing could be done externally (or not) via pullup/pulldowns on
> the net. The gpio driver should be able to make pins into inputs
> automatically when the gpio is requested and used so having input or
> output is typically wrong and should be handled by the consumer driver.
Okay. will re arrange accordingly and remove output-high property.
>
>> + };
>> +
>> + data {
>> + pins = "gpio7";
>> + function = "dmic1_data";
> So in the end I'd expect to only see pins and function properties in the
> SoC dtsi file.
Okay.
>
>> + drive-strength = <8>;
>> + };
>> + };
>> +
>> + dmic01_sleep: dmic01-sleep {
>> + clk {
>> + pins = "gpio6";
>> + function = "dmic1_clk";
prev parent reply other threads:[~2022-04-05 5:05 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-21 11:59 [PATCH v5 0/3] Add lpass pin control support for audio on sc7280 based targets Srinivasa Rao Mandadapu
2022-03-21 11:59 ` [PATCH v5 1/3] arm64: dts: qcom: sc7280: Add pinctrl for wcd938x codec reset and CTIA/OMTP headset selection Srinivasa Rao Mandadapu
2022-03-21 20:27 ` Stephen Boyd
2022-04-05 5:07 ` Srinivasa Rao Mandadapu
2022-03-21 11:59 ` [PATCH v5 2/3] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset Srinivasa Rao Mandadapu
2022-03-21 20:30 ` Stephen Boyd
2022-04-05 5:14 ` Srinivasa Rao Mandadapu
2022-03-21 11:59 ` [PATCH v5 3/3] arm64: dts: qcom: sc7280: add lpass lpi pin controller node Srinivasa Rao Mandadapu
2022-03-21 20:26 ` Stephen Boyd
2022-04-05 5:05 ` Srinivasa Rao Mandadapu [this message]
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