From: Russ Weight <russell.h.weight@intel.com>
To: <broonie@kernel.org>, <gregkh@linuxfoundation.org>,
<rafael@kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <yilun.xu@intel.com>, <matthew.gerlach@linux.intel.com>
Subject: Re: [PATCH 1/1] regmap: spi-avmm: Fix regmap_bus max_raw_write
Date: Tue, 20 Jun 2023 14:22:15 -0700 [thread overview]
Message-ID: <5d6c7683-0e96-c906-4d17-5f4a087a51ff@intel.com> (raw)
In-Reply-To: <20230620202824.380313-1-russell.h.weight@intel.com>
On 6/20/23 13:28, Russ Weight wrote:
> The max_raw_write member of the regmap_spi_avmm_bus structure is defined
> as:
> .max_raw_write = SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT
>
> SPI_AVMM_VAL_SIZE == 4 and MAX_WRITE_CNT == 1 so this results in a
> maximum write transfer size of 4 bytes which provides only enough space to
> transfer the address of the target register. It provides no space for the
> value to be transferred. This bug became an issue (divide-by-zero in
> _regmap_raw_write()) after the following was accepted into mainline:
>
> commit 3981514180c9 ("regmap: Account for register length when chunking")
>
> Change max_raw_write to include space (4 additional bytes) for both the
> register address and value:
>
> .max_raw_write = SPI_AVMM_REG_SIZE + SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT
>
> Fixes: 7f9fb67358a2 ("regmap: add Intel SPI Slave to AVMM Bus Bridge support")
> Reviewed-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Cc: stable@vger.kernel.org
> ---
> drivers/base/regmap/regmap-spi-avmm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/base/regmap/regmap-spi-avmm.c b/drivers/base/regmap/regmap-spi-avmm.c
> index 4c2b94b3e30b..6af692844c19 100644
> --- a/drivers/base/regmap/regmap-spi-avmm.c
> +++ b/drivers/base/regmap/regmap-spi-avmm.c
> @@ -660,7 +660,7 @@ static const struct regmap_bus regmap_spi_avmm_bus = {
> .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
> .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
> .max_raw_read = SPI_AVMM_VAL_SIZE * MAX_READ_CNT,
> - .max_raw_write = SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT,
> + .max_raw_write = SPI_AVMM_REG_SIZE + SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT,
> .free_context = spi_avmm_bridge_ctx_free,
> };
>
next prev parent reply other threads:[~2023-06-20 21:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 20:28 Russ Weight
2023-06-20 21:22 ` Russ Weight [this message]
2023-06-20 22:03 ` Mark Brown
2023-06-25 4:26 ` Xu Yilun
2023-06-26 19:47 ` Mark Brown
2023-06-26 20:23 ` Jim Wylder
2023-06-27 3:36 ` Xu Yilun
2023-06-27 11:58 ` Mark Brown
2023-06-27 12:48 ` Jim Wylder
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