Re: [PATCH v3 3/3] arm64: dts: qcom: sm8750: Add GPU clock & IOMMU nodes

[Taniya Das <taniya.das@oss.qualcomm.com>]

On 2/23/2026 6:51 PM, Konrad Dybcio wrote:
> On 2/21/26 7:22 PM, Akhil P Oommen wrote:
>> On 2/20/2026 11:24 AM, Taniya Das wrote:
>>> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>
>>> Add the GPU_CC and GX_CC (brand new! as far as we're concerned, this
>>> is simply a separate block housing the GX GDSC) nodes, required to
>>> power up the graphics-related hardware.
>>>
>>> Make use of it by enabling the associated IOMMU as well. The GPU itself
>>> needs some more work and will be enabled later.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>> Co-developed-by: Taniya Das <taniya.das@oss.qualcomm.com>
>>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/sm8750.dtsi | 64 ++++++++++++++++++++++++++++++++++++
>>>  1 file changed, 64 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> index f56b1f889b857a28859910f5c4465c8ce3473b00..0cc931d0bc96e9563ce4e7989ecd4ba50bd424f8 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> @@ -4,7 +4,9 @@
>>>   */
>>>  
>>>  #include <dt-bindings/clock/qcom,rpmh.h>
>>> +#include <dt-bindings/clock/qcom,kaanapali-gxclkctl.h>
>>>  #include <dt-bindings/clock/qcom,sm8750-gcc.h>
>>> +#include <dt-bindings/clock/qcom,sm8750-gpucc.h>
>>>  #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
>>>  #include <dt-bindings/clock/qcom,sm8750-videocc.h>
>>>  #include <dt-bindings/dma/qcom-gpi.h>
>>> @@ -3001,6 +3003,30 @@ videocc: clock-controller@aaf0000 {
>>>  			#power-domain-cells = <1>;
>>>  		};
>>>  
>>> +		gxclkctl: clock-controller@3d64000 {
>>> +			compatible = "qcom,sm8750-gxclkctl";
>>> +			reg = <0x0 0x03d64000 0x0 0x6000>;
>>> +
>>> +			power-domains = <&rpmhpd RPMHPD_GFX>,
>>> +					<&rpmhpd RPMHPD_GMXC>,
>>> +					<&gpucc GPU_CC_CX_GDSC>;
>>> +
>>> +			#power-domain-cells = <1>;
>>> +		};
>>> +
>>> +		gpucc: clock-controller@3d90000 {
>>> +			compatible = "qcom,sm8750-gpucc";
>>> +			reg = <0x0 0x03d90000 0x0 0x9800>;
>>> +
>>> +			clocks = <&bi_tcxo_div2>,
>>> +				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
>>> +				 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
>>> +
>>> +			#clock-cells = <1>;
>>> +			#reset-cells = <1>;
>>> +			#power-domain-cells = <1>;
>>
>> On Pakala and newer GPUs, we need to scale GMU (which is connected to
>> the CX GDSC) freq. Is this DT description sufficient to allow scaling of
>> GMU OPP?
> 
> No, certainly not.
> 
> I see that GPU_CC on this one is exclusively powered by VDD_CX, with
> some MXA backing, so the natural course of action would be to add a
> RPMHPD_CX power-domains handle here. Then, voting on the CX_GDSC will
> propagate the performance state to RPMHPD_CX.
> 
> Taniya, I see there's also some MXA backing. Do we need to scale it,
> or is "just ON" fine here?
> 

MXA is required along with CX and I will update the bindings accordingly
to take care of required power domains.

-- 
Thanks,
Taniya Das