From: Mukesh Savaliya <mukesh.savaliya@oss.qualcomm.com>
To: Praveen Talari <praveen.talari@oss.qualcomm.com>,
konrad.dybcio@oss.qualcomm.com,
Sudeep Holla <sudeep.holla@kernel.org>,
Cristian Marussi <cristian.marussi@arm.com>,
Ulf Hansson <ulfh@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Mark Brown <broonie@kernel.org>,
Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>,
Andi Shyti <andi.shyti@kernel.org>
Cc: chandana.chiluveru@oss.qualcomm.com, arm-scmi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-serial@vger.kernel.org, linux-spi@vger.kernel.org,
linux-i2c@vger.kernel.org
Subject: Re: [PATCH v3 1/8] soc: qcom: geni-se: Populate clk_perf_tbl with SE source clock frequencies from perf OPP table
Date: Thu, 22 Oct 2026 17:52:15 +0530 [thread overview]
Message-ID: <5dfd7245-c2c0-4468-95ed-6bb8a385da98@oss.qualcomm.com> (raw)
In-Reply-To: <20261015-derive_clk_perf_tbl_from_perf_domain_opp_table-v3-1-5da1096243c9@oss.qualcomm.com>
On 10/15/2026 6:28 PM, Praveen Talari wrote:
> Currently, on the SA8255P platform, protocol drivers attached via
> geni_se_domain_attach() treat each OPP on the perf domain as directly
> corresponding to a protocol value such as a baudrate or requested
> frequency, and simply request that OPP via
> geni_se_set_perf_level()/geni_se_set_perf_opp(). This does not allow
> computing a source clock and divider combination for a protocol
> requested frequency, unlike the Linux clock managed path which derives
> this from se->clk_perf_tbl via geni_se_clk_freq_match(), and then
> applies the matched source clock frequency with dev_pm_opp_set_rate().
>
> Change this by treating the OPP table exposed on the perf domain
> device as representing the actual SE HW supported source clock
> frequencies, the same role clk_perf_tbl plays for the Linux clock
> managed path. Populate se->clk_perf_tbl and se->num_clk_levels by
> iterating over this OPP table in geni_se_domain_attach(), so that
> protocol drivers on the firmware managed (SA8255P) path can also use
> geni_se_clk_freq_match() to pick the closest supported source clock
> frequency and calculate the required divider, and apply it with
> dev_pm_opp_set_rate() the same way as it is done for the Linux clock
> managed path, instead of relying on a direct frequency/baudrate-to-
> perf-level mapping.
>
> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
> ---
Reviewed-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>
next prev parent reply other threads:[~2026-10-22 12:22 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 12:58 [PATCH v3 0/8] soc: qcom: geni: Derive SE clock configuration from OPP table on SA8255P Praveen Talari
2026-10-15 12:58 ` [PATCH v3 1/8] soc: qcom: geni-se: Populate clk_perf_tbl with SE source clock frequencies from perf OPP table Praveen Talari
2026-10-22 12:22 ` Mukesh Savaliya [this message]
2026-10-15 12:58 ` [PATCH v3 2/8] soc: qcom: geni-se: Add helper to set SE clock rate via OPP Praveen Talari
2026-10-15 12:58 ` [PATCH v3 3/8] soc: qcom: geni-se: Remove OPP rate reset from resource deactivation Praveen Talari
2026-10-15 12:58 ` [PATCH v3 4/8] serial: qcom-geni: Use geni_se_set_rate() for source clock configuration Praveen Talari
2026-10-15 12:58 ` [PATCH v3 5/8] spi: qcom-geni: Use geni_se_set_rate() for setting source clock frequency Praveen Talari
2026-10-15 12:58 ` [PATCH v3 6/8] i2c: qcom-geni: Vote for SE clock rate using OPP Praveen Talari
2026-10-22 12:28 ` Mukesh Savaliya
2026-10-15 12:58 ` [PATCH v3 7/8] i2c: qcom-geni: Use common GENI resource initialization helper Praveen Talari
2026-10-15 12:58 ` [PATCH v3 8/8] i2c: qcom-geni: Use geni_se_set_rate() for setting source clock frequency Praveen Talari
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