From: Paolo Bonzini <pbonzini@redhat.com>
To: Nikita Leshenko <nikita.leshchenko@oracle.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: "Sean Christopherson" <sean.j.christopherson@intel.com>,
"Liran Alon" <liran.alon@oracle.com>,
"Radim Krčmář" <rkrcmar@redhat.com>
Subject: Re: [PATCH] kvm: nVMX: fix entry with pending interrupt if APICv is enabled
Date: Wed, 3 Oct 2018 16:51:28 +0200 [thread overview]
Message-ID: <5fdf6569-462c-57cc-6f7c-c677221e7a08@redhat.com> (raw)
In-Reply-To: <31248579054378dd2b820682c8ea99c9fb9b62cb.camel@oracle.com>
On 03/10/2018 16:36, Nikita Leshenko wrote:
> On Wed, 2018-10-03 at 13:47 +0200, Paolo Bonzini wrote:
>> Commit b5861e5cf2fcf83031ea3e26b0a69d887adf7d21 introduced a check on
>> the interrupt-window and NMI-window CPU execution controls in order to
>> inject an external interrupt vmexit before the first guest instruction
>> executes. However, when APIC virtualization is enabled the host does not
>> need a vmexit in order to inject an interrupt at the next interrupt window;
>> instead, it just places the interrupt vector in RVI and the processor will
>> inject it as soon as possible. Therefore, on machines with APICv it is
>> not enough to check the CPU execution controls: the same scenario can also
>> happen if RVI>0.
>>
>> Fixes: b5861e5cf2fcf83031ea3e26b0a69d887adf7d21
>> Cc: Nikita Leshchenko <nikita.leshchenko@oracle.com>
>> Cc: Sean Christopherson <sean.j.christopherson@intel.com>
>> Cc: Liran Alon <liran.alon@oracle.com>
>> Cc: Radim Krčmář <rkrcmar@redhat.com>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>> ---
>> arch/x86/kvm/vmx.c | 16 +++++++++++-----
>> 1 file changed, 11 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> index 6ef2d5b139b9..c0c7689f0049 100644
>> --- a/arch/x86/kvm/vmx.c
>> +++ b/arch/x86/kvm/vmx.c
>> @@ -10280,6 +10280,11 @@ static void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr)
>> }
>> }
>>
>> +static u8 vmx_get_rvi(void)
>> +{
>> + return vmcs_read16(GUEST_INTR_STATUS) & 0xff;
>> +}
>> +
>> static void vmx_set_rvi(int vector)
>> {
>> u16 status;
>> @@ -12593,10 +12598,13 @@ static int enter_vmx_non_root_mode(struct kvm_vcpu *vcpu, u32 *exit_qual)
>> struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
>> bool from_vmentry = !!exit_qual;
>> u32 dummy_exit_qual;
>> - u32 vmcs01_cpu_exec_ctrl;
>> + bool evaluate_pending_interrupts;
>> int r = 0;
>>
>> - vmcs01_cpu_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
>> + evaluate_pending_interrupts = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) &
>> + (CPU_BASED_VIRTUAL_INTR_PENDING | CPU_BASED_VIRTUAL_NMI_PENDING);
>> + if (enable_apicv && kvm_vcpu_apicv_active(vcpu))
>> + evaluate_pending_interrupts |= vmx_get_rvi() > 0;
>
> You should check for RVI > VPPR, similarly to how it is done in
> vmx_guest_apic_has_interrupt().
>
> Also, now that you introduced vmx_get_rvi(), it could be nice to use it
> in vmx_guest_apic_has_interrupt() as well.
>
> Apart from that, looks good.
>
> Reviewed-by: Nikita Leshenko <nikita.leshchenko@oracle.com>
Nevermind, vPPR is of course available in vcpu->arch.apic since this is
L1. So v2 is on the way.
Paolo
next prev parent reply other threads:[~2018-10-03 14:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-03 11:47 Paolo Bonzini
2018-10-03 14:36 ` Nikita Leshenko
2018-10-03 14:41 ` Paolo Bonzini
2018-10-03 14:51 ` Paolo Bonzini [this message]
2018-10-03 14:53 ` Sean Christopherson
2018-10-03 14:54 ` Paolo Bonzini
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