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From: Imre Kaloz <kaloz@kernel.org>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	Lee Jones <lee@kernel.org>
Subject: [PATCH v2 33/53] MIPS: SGI-IP27: add L1 system controller support
Date: Tue, 13 Oct 2026 15:16:53 +0200	[thread overview]
Message-ID: <60de08740e1796b8ac0f2aaea1c70731c702ecae.1791890466.git.kaloz@kernel.org> (raw)
In-Reply-To: <cover.1791890466.git.kaloz@kernel.org>

IP35-family (Bedrock hub) machines carry an L1 system controller on a
polled UART with RFC 1662 async-HDLC framing. Add the transport, the
request/response core and l1_exec_command(); on a Hub every request
fails with -ENODEV.

Ported from OpenBSD sys/arch/sgi/sgi/l1.c and licensed ISC like it,
keeping its notice.

Signed-off-by: Imre Kaloz <kaloz@kernel.org>
---
 arch/mips/Kconfig             |   1 +
 arch/mips/include/asm/sn/l1.h |  14 ++
 arch/mips/sgi-ip27/Makefile   |   4 +-
 arch/mips/sgi-ip27/ip27-l1.c  | 423 ++++++++++++++++++++++++++++++++++
 4 files changed, 440 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/include/asm/sn/l1.h
 create mode 100644 arch/mips/sgi-ip27/ip27-l1.c

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 85f1c4bd6549..b7026672a4c1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -762,6 +762,7 @@ config SGI_IP27
 	select FW_ARC64
 	select ARC_CMDLINE_ONLY
 	select BOOT_ELF64
+	select CRC_CCITT
 	select DEFAULT_SGI_PARTITION
 	select FORCE_PCI
 	select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/include/asm/sn/l1.h b/arch/mips/include/asm/sn/l1.h
new file mode 100644
index 000000000000..e61935e2fac8
--- /dev/null
+++ b/arch/mips/include/asm/sn/l1.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entry points into the SGI L1 system controller driver.
+ *
+ * Copyright (C) 2026 Imre Kaloz <kaloz@kernel.org>
+ */
+#ifndef __ASM_SN_L1_H
+#define __ASM_SN_L1_H
+
+#include <linux/types.h>
+
+int l1_exec_command(const char *cmd);
+
+#endif /* __ASM_SN_L1_H */
diff --git a/arch/mips/sgi-ip27/Makefile b/arch/mips/sgi-ip27/Makefile
index 9877fcc512b1..4b6aa641ccc6 100644
--- a/arch/mips/sgi-ip27/Makefile
+++ b/arch/mips/sgi-ip27/Makefile
@@ -4,8 +4,8 @@
 #
 
 obj-y	:= ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o \
-	   ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o \
-	   ip27-xtalk.o
+	   ip27-klnuma.o ip27-l1.o ip27-memory.o ip27-nmi.o ip27-reset.o \
+	   ip27-timer.o ip27-xtalk.o
 
 obj-$(CONFIG_EARLY_PRINTK)	+= ip27-console.o
 obj-$(CONFIG_SMP)		+= ip27-smp.o
diff --git a/arch/mips/sgi-ip27/ip27-l1.c b/arch/mips/sgi-ip27/ip27-l1.c
new file mode 100644
index 000000000000..da3095b66cf1
--- /dev/null
+++ b/arch/mips/sgi-ip27/ip27-l1.c
@@ -0,0 +1,423 @@
+// SPDX-License-Identifier: ISC
+/*
+ * Copyright (C) 2026 Imre Kaloz <kaloz@kernel.org>
+ *
+ * SGI L1 system controller communication, ported from OpenBSD/sgi's
+ * l1.c:
+ *
+ * Copyright (c) 2009 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * The L1 is the IP35-family (Bedrock hub) system controller, reached
+ * over a polled UART with async-HDLC (PPP) framing. Every request fails
+ * with -ENODEV on an IP27 (Hub) machine.
+ */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/serial_reg.h>
+#include <linux/spinlock.h>
+#include <linux/stdarg.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/unaligned.h>
+#include <linux/crc-ccitt.h>
+#include <linux/io.h>
+
+#include <asm/sn/addrs.h>
+#include <asm/sn/agent.h>
+#include <asm/sn/l1.h>
+#include <asm/sn/types.h>
+
+/* packet types */
+#define L1PKT_REQUEST		0x00
+#define L1PKT_RESPONSE		0x20
+
+/* packet subchannels */
+#define L1CH_MISC		0x10	/* available for operating system */
+
+/* argument encoding */
+#define L1_ARG_INT		0x00	/* followed by 32 bit BE value */
+#define L1_ARG_ASCII		0x01	/* followed by NUL terminated string */
+#define L1_ARG_BINARY		0x80	/* length in low 7 bits */
+
+/* command types and destination addresses */
+#define L1_ADDRESS(type, addr)	(((type) << 28) | (addr))
+
+#define L1_TYPE_L1		0x00
+
+#define L1_ADDRESS_RACK_LOCAL	0x3ff
+#define L1_ADDRESS_RACK_SHIFT	18
+#define L1_ADDRESS_BAY_LOCAL	0x3f
+#define L1_ADDRESS_BAY_SHIFT	12
+
+#define L1_ADDRESS_LOCAL \
+	((L1_ADDRESS_RACK_LOCAL << L1_ADDRESS_RACK_SHIFT) | \
+	 (L1_ADDRESS_BAY_LOCAL << L1_ADDRESS_BAY_SHIFT))
+
+#define L1_TASK_COMMAND		0x03
+
+/* response codes */
+#define L1_RESP_OK		((u32)0)
+#define L1_RESP_NXDATA		((u32)-0x68)
+#define L1_RESP_INVAL		((u32)-0x6b)
+
+/* L1_TASK_COMMAND requests */
+#define L1_REQ_EXEC_CMD		0x0000	/* interpret plaintext command */
+
+/* Async-HDLC framing bytes; linux/ppp_defs.h would drag in skbuff.h. */
+#define L1_FLAG			0x7e
+#define L1_ESC			0x7d
+#define L1_TRANS		0x20
+#define L1_FCS_INIT		0xffff
+#define L1_FCS_GOOD		0xf0b8
+
+/* A raw iteration count, not a time bound: this can run before jiffies. */
+#define L1_POLL_ITERATIONS	1000000
+
+/*
+ * The L1 UART sits in the HSPEC "local register" window, reached
+ * through the "remote HSPEC" indirection even for the local node.
+ */
+#define L1_RHSPEC_OFFSET	0x20000000	/* remote-HSPEC indirection */
+#define L1_LREG_OFFSET		0x10000000	/* local register window */
+#define L1_UART_REG(r)		(L1_LREG_OFFSET + 0x80 + ((r) << 3))
+
+#define L1_UART_ADDRESS(nasid, r) \
+	((u64 *)(NODE_HSPEC_BASE(nasid) + L1_RHSPEC_OFFSET + L1_UART_REG(r)))
+
+static int l1_serial_getc(nasid_t nasid)
+{
+	unsigned int n;
+	u64 lsr;
+
+	for (n = L1_POLL_ITERATIONS; n != 0; n--) {
+		lsr = __raw_readq(L1_UART_ADDRESS(nasid, UART_LSR));
+		if (lsr & UART_LSR_DR)
+			break;
+		cpu_relax();
+	}
+	if (n == 0)
+		return -ETIMEDOUT;
+
+	return __raw_readq(L1_UART_ADDRESS(nasid, UART_RX)) & 0xff;
+}
+
+static int l1_serial_putc(nasid_t nasid, u8 val)
+{
+	unsigned int n;
+	u64 lsr;
+
+	for (n = L1_POLL_ITERATIONS; n != 0; n--) {
+		lsr = __raw_readq(L1_UART_ADDRESS(nasid, UART_LSR));
+		if (lsr & UART_LSR_THRE)
+			break;
+		cpu_relax();
+	}
+	if (n == 0)
+		return -ETIMEDOUT;
+
+	__raw_writeq(val, L1_UART_ADDRESS(nasid, UART_TX));
+	return 0;
+}
+
+static int l1_serial_ppp_write(nasid_t nasid, u16 *crc, u8 data, bool escape)
+{
+	int rc;
+
+	if (crc)
+		*crc = crc_ccitt_byte(*crc, data);
+
+	if (escape && (data == L1_FLAG || data == L1_ESC)) {
+		rc = l1_serial_putc(nasid, L1_ESC);
+		if (rc)
+			return rc;
+		data ^= L1_TRANS;
+	}
+
+	return l1_serial_putc(nasid, data);
+}
+
+static int l1_packet_put(nasid_t nasid, const u8 *packet, size_t len)
+{
+	u16 crc = L1_FCS_INIT;
+	int rc;
+
+	rc = l1_serial_ppp_write(nasid, NULL, L1_FLAG, false);
+	if (rc)
+		return rc;
+
+	while (len-- != 0) {
+		rc = l1_serial_ppp_write(nasid, &crc, *packet++, true);
+		if (rc)
+			return rc;
+	}
+
+	crc ^= L1_FCS_INIT;
+	rc = l1_serial_ppp_write(nasid, NULL, crc & 0xff, true);
+	if (rc)
+		return rc;
+	rc = l1_serial_ppp_write(nasid, NULL, (crc >> 8) & 0xff, true);
+	if (rc)
+		return rc;
+
+	return l1_serial_ppp_write(nasid, NULL, L1_FLAG, false);
+}
+
+static int l1_packet_get(nasid_t nasid, u8 *buf, size_t buflen, size_t *rlen)
+{
+	u16 crc;
+	size_t rcvlen;
+	int data;
+
+	for (;;) {
+		data = l1_serial_getc(nasid);
+		if (data < 0)
+			return data;
+		if (data == L1_FLAG)
+			break;
+	}
+
+	rcvlen = 0;
+	crc = L1_FCS_INIT;
+	for (;;) {
+		data = l1_serial_getc(nasid);
+		if (data < 0)
+			return data;
+		if (data == L1_FLAG)	/* end of packet */
+			break;
+		if (data == L1_ESC) {
+			data = l1_serial_getc(nasid);
+			if (data < 0)
+				return data;
+			data ^= L1_TRANS;
+		}
+		if (rcvlen < buflen)
+			buf[rcvlen] = data;
+		rcvlen++;
+		crc = crc_ccitt_byte(crc, data);
+	}
+
+	if (rcvlen > buflen)
+		return -EMSGSIZE;	/* did not fit the buffer */
+	if (rcvlen < 2)
+		return -EBADMSG;	/* short packet */
+
+	rcvlen -= 2;			/* crc bytes */
+	if (crc != L1_FCS_GOOD)
+		return -EBADMSG;	/* CRC error */
+
+	*rlen = rcvlen;
+	return 0;
+}
+
+/*
+ * Returns the would-be length even when the buffer is too small, and
+ * SIZE_MAX for an unknown argument type.
+ */
+static size_t l1_command_build(u8 *buf, size_t buflen, u32 address,
+			       u16 request, int nargs, va_list ap)
+{
+	u32 data;
+	size_t len = 0;
+	int argtype;
+	const char *str;
+
+	if (buflen >= 1) {
+		*buf++ = L1PKT_REQUEST | L1CH_MISC;
+		buflen--;
+	}
+	len++;
+
+	if (buflen >= 4) {
+		put_unaligned_be32(address, buf);
+		buf += 4;
+		buflen -= 4;
+	}
+	len += 4;
+
+	if (buflen >= 2) {
+		put_unaligned_be16(request, buf);
+		buf += 2;
+		buflen -= 2;
+	}
+	len += 2;
+
+	if (buflen >= 1) {
+		*buf++ = nargs;
+		buflen--;
+	}
+	len++;
+
+	while (nargs-- != 0) {
+		argtype = va_arg(ap, int);
+		switch (argtype) {
+		case L1_ARG_INT:
+			data = va_arg(ap, u32);
+			if (buflen >= 5) {
+				*buf++ = L1_ARG_INT;
+				put_unaligned_be32(data, buf);
+				buf += 4;
+				buflen -= 5;
+			}
+			len += 5;
+			break;
+		case L1_ARG_ASCII:
+			str = va_arg(ap, const char *);
+			data = strlen(str);
+			if (buflen >= data + 2) {
+				*buf++ = L1_ARG_ASCII;
+				memcpy(buf, str, data + 1);
+				buf += data + 1;
+				buflen -= data + 2;
+			}
+			len += data + 2;
+			break;
+		case L1_ARG_BINARY:
+			data = (u32)va_arg(ap, size_t);	/* size */
+			str = va_arg(ap, const char *);	/* data */
+			if (buflen >= 1 + data) {
+				*buf++ = L1_ARG_BINARY | data;
+				memcpy(buf, str, data);
+				buf += data;
+				buflen -= data + 1;
+			}
+			len += data + 1;
+			break;
+		default:
+			WARN_ON_ONCE(1);
+			return SIZE_MAX;
+		}
+	}
+
+	return len;
+}
+
+/* The L1 multiplexes unsolicited event and console traffic onto one wire. */
+static int l1_receive_response(nasid_t nasid, u8 *pkt, size_t *pktlen)
+{
+	size_t rcvlen;
+	int rc;
+
+	for (;;) {
+		rc = l1_packet_get(nasid, pkt, *pktlen, &rcvlen);
+		if (rc == -ETIMEDOUT)
+			return rc;
+		if (rc)		/* bad packet */
+			continue;
+		if (pkt[0] != (L1PKT_RESPONSE | L1CH_MISC))
+			continue;
+
+		*pktlen = rcvlen;
+		return 0;
+	}
+}
+
+static int l1_response_to_errno(u32 response)
+{
+	switch (response) {
+	case L1_RESP_OK:
+		return 0;
+	case L1_RESP_INVAL:
+		return -EINVAL;
+	case L1_RESP_NXDATA:
+		return -ENXIO;
+	default:
+		return -EIO;
+	}
+}
+
+/*
+ * One request and its response are a single transaction on the wire,
+ * so every entry point holds this.
+ */
+static DEFINE_SPINLOCK(l1_lock);
+
+/*
+ * Run one request/response exchange in pkt, which has to be large enough
+ * for both; returns the response's argument count.
+ */
+static int l1_transact(nasid_t nasid, u8 *pkt, size_t pktsize, u32 address,
+		       u16 request, u8 **rargs, size_t *rarglen, int nargs, ...)
+{
+	va_list ap;
+	size_t pktlen;
+	int rc;
+
+	if (!system_is_ip35)
+		return -ENODEV;
+
+	va_start(ap, nargs);
+	pktlen = l1_command_build(pkt, pktsize, address, request, nargs, ap);
+	va_end(ap);
+	if (pktlen > pktsize)
+		return -ENOMEM;
+
+	rc = l1_packet_put(nasid, pkt, pktlen);
+	if (rc)
+		return rc;
+
+	pktlen = pktsize;
+	rc = l1_receive_response(nasid, pkt, &pktlen);
+	if (rc)
+		return rc;
+
+	if (pktlen < 6)
+		return -EIO;
+
+	rc = l1_response_to_errno(get_unaligned_be32(&pkt[1]));
+	if (rc)
+		return rc;
+
+	if (rargs) {
+		*rargs = pkt + 6;
+		*rarglen = pktlen - 6;
+	}
+
+	return pkt[5];
+}
+
+/*
+ * Send a plaintext command to the L1's own console command parser, the
+ * same strings a human types at the L1 console. Such a command can reset
+ * the Hub, or cut power to it, before the L1 answers, so an error here
+ * means "no response", never "retry".
+ */
+int l1_exec_command(const char *cmd)
+{
+	u32 address = L1_ADDRESS(L1_TYPE_L1,
+				 L1_ADDRESS_LOCAL | L1_TASK_COMMAND);
+	u8 pkt[64 + 64];	/* command and response packet buffer */
+	unsigned long flags;
+	bool locked;
+	int rc;
+
+	/*
+	 * Reset and poweroff reach this after smp_send_stop(), so a stopped
+	 * CPU may hold the lock for good; go to the wire either way.
+	 */
+	locked = spin_trylock_irqsave(&l1_lock, flags);
+
+	rc = l1_transact(get_nasid(), pkt, sizeof(pkt), address,
+			 L1_REQ_EXEC_CMD, NULL, NULL, 1,
+			 L1_ARG_ASCII, cmd);
+
+	if (locked)
+		spin_unlock_irqrestore(&l1_lock, flags);
+
+	if (rc < 0)
+		return rc;
+
+	/* nothing is expected back besides the response code */
+	return rc == 0 ? 0 : -EIO;
+}
-- 
2.47.3


  parent reply	other threads:[~2026-10-13 13:19 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-13 13:16 [PATCH v2 00/53] MIPS: SGI-IP27: add support for the IP35 (Bedrock hub) machines Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 01/53] MIPS: PCI: xtalk-bridge: refuse device numbers past the last slot Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 02/53] MIPS: PCI: xtalk-bridge: assign slots the PROM leaves unconfigured Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 03/53] MIPS: PCI: xtalk-bridge: write a type 1 IOC3 through the type 1 window Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 04/53] MIPS: PCI: xtalk-bridge: flush config space writes Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 05/53] MIPS: PCI: xtalk-bridge: reassign slots whose devio window maps elsewhere Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 06/53] MIPS: Xtalk: guard the widget identification table from assembly Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 07/53] MIPS: SGI-IP27: dump the NMI save areas the CPU scan recorded Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 08/53] MIPS: SGI-IP27: add REMOTE_HUB_PI_S()/REMOTE_HUB_PI_L() Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 09/53] MIPS: SGI-IP27: detect Bedrock hubs at boot Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 10/53] MIPS: SGI-IP27: widen Kconfig for the Bedrock-based machines Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 11/53] MIPS: SGI-IP27: fold the dead SN1 arm out of klconfig.h Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 12/53] MIPS: SGI-IP27: choose the node address layout at runtime Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 13/53] MIPS: SGI-IP27: add the Bedrock hub register windows Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 14/53] MIPS: SGI-IP27: decode a Bedrock hub's node id and system size Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 15/53] MIPS: SGI-IP27: put a Bedrock hub's boot CPU in slot 0 Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 16/53] MIPS: SGI-IP27: lay out node memory in 1GB banks on Bedrock hubs Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 17/53] MIPS: SGI-IP27: reserve the bottom 64MB of node 0 " Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 18/53] MIPS: SGI-IP27: route interrupt masks and slices through both PIs Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 19/53] MIPS: SGI-IP27: address a CPU's own PI for NMI, IPI and RT counter Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 20/53] MIPS: SGI-IP27: take a CPU's node from the CPU table in per_cpu_init() Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 21/53] MIPS: SGI-IP27: resolve the mapped-kernel node shift at runtime Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 22/53] MIPS: SGI-IP27: load the kernel at node offset 0x40000 Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 23/53] MIPS: SGI-IP27: xbow_probe(): recognize KLTYPE_PBRICK_XBOW Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 24/53] MIPS: ip27_defconfig: enable the IOC3 MFD, its cell drivers and tg3 Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 25/53] net: ethernet: sgi: ioc3-eth: apply the DMA attributes only to 64-bit addresses Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 26/53] MIPS: SGI-IP27: pick the XBridge and PIC DMA address form by mask Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 27/53] MIPS: SGI-IP27: recognize the PXBow crossbar Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 28/53] MIPS: PCI: xtalk-bridge: recognize the PIC widget's 64-bit-only registers Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 29/53] MIPS: PCI: xtalk-bridge: match PIC's register-level differences Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 30/53] rtc: m48t35: support the SGI IP35 timekeeper's 1968 year base Imre Kaloz
2026-10-13 14:28   ` Alexandre Belloni
2026-10-13 13:16 ` [PATCH v2 31/53] mfd: ioc3: Add support for IOC4 Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 32/53] MIPS: SGI-IP27: dispatch the early console between IOC3 and IOC4 Imre Kaloz
2026-10-13 13:16 ` Imre Kaloz [this message]
2026-10-13 13:16 ` [PATCH v2 34/53] MIPS: SGI-IP27: wire the L1 into reset and the Ethernet address Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 35/53] MIPS: PCI: xtalk-bridge: take the board part number from the L1 Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 36/53] mfd: ioc3: Add IP34 system-board entry to ioc3_infos[] Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 37/53] mfd: ioc3: Cross the serial IRQs on the Origin 300 IO8 Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 38/53] net: ethernet: sgi: ioc3-eth: fall back to the platform MAC address Imre Kaloz
2026-10-13 13:16 ` [PATCH v2 39/53] MIPS: SGI-IP27: don't register a w1 master on an XBridge or PIC Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 40/53] MIPS: SGI-IP27: report a Bedrock machine as SGI IP35 Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 41/53] MIPS: SGI-IP27: identify the machine by the L1 brick type Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 42/53] MIPS: SGI-IP27: register the Odyssey graphics widget Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 43/53] MIPS: SGI-IP27: take the console from the KLCONFIG header on IP35 Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 44/53] MIPS: SGI-IP27: give each CPU its own topology package id Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 45/53] ata: add pata_sgiioc4 driver for the SGI IOC4 ATA/ATAPI controller Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 46/53] mfd: ioc3: Add IOC4 ATA/ATAPI cell Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 47/53] MAINTAINERS: add an entry for the SGI IOC4 ATA driver Imre Kaloz
2026-10-13 13:25   ` Damien Le Moal
2026-10-13 13:38     ` Imre Kaloz
2026-10-13 15:13       ` Damien Le Moal
2026-10-13 13:17 ` [PATCH v2 48/53] MIPS: ip27_defconfig: update for the onboard hardware Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 49/53] MIPS: ip27_defconfig: enable pata_sgiioc4 and the DVD-ROM path Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 50/53] MIPS: SGI-IP27: add L1 front-panel LED and display requests Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 51/53] leds: Add driver for the SGI Fuel and Tezro front-panel LEDs Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 52/53] MIPS: SGI-IP27: show the OS state on the Fuel and Tezro front panels Imre Kaloz
2026-10-13 13:17 ` [PATCH v2 53/53] MIPS: ip27_defconfig: enable the Fuel and Tezro front-panel LEDs Imre Kaloz
2026-10-13 13:35 ` [PATCH v2 00/53] MIPS: SGI-IP27: add support for the IP35 (Bedrock hub) machines Niklas Cassel
2026-10-13 14:25   ` Imre Kaloz

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