Re: [PATCH v4 2/4] clk: rockchip: Add internal support for 24-bit fractional dividers

["Heiko Stübner" <heiko@sntech.de>]

Am Dienstag, 27. Oktober 2026, 11:41:25 Mitteleuropäische Normalzeit schrieb Cunhao Lu:
> > I guess you are describing what you changed against the
> > original patch from Elaine. But this is not how it works.
> 
> I'm very sorry for the mistake. After carefully reviewing the guidelines,
> I understand that my notes about changes to Elaine's original patch should
> have been enclosed in square brackets []. I will keep only the significant
> changes in those notes and place them within square brackets.
> 
> Thank you again for pointing out my mistake. This reminds me that I still
> have much to learn.

and as I wrote in my reply to Krzysztof slightly, less verbosity is
usually better. I.e. a short description what you did, not a detailed
list is usually nicer, i.e. something like

+++++++++++++
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[adapted to mainline rockchip clock and reset handling (xin24m input,
  don't introduce CLK_NR_CLKS, etc) ]
Signed-off-by: Cunhao Lu <1579567540@qq.com>
+++++++++++++

And as for speed, maybe give it a bit more time between iterations.
A version per day is a bit fast, as it doesn't give people time to actually
respond.