[PATCH v2 1/3] arm64: dts: imx8mm-tqma8mqml: restrict clock for SPI-NOR flash

[PATCH v2 1/3] arm64: dts: imx8mm-tqma8mqml: restrict clock for SPI-NOR flash

[Alexander Stein]

From: Markus Niebel <Markus.Niebel@ew.tq-group.com>

The FlexSPI controller uses quad SPI with internal clock recovery.
The i.MX 8M Mini Applications Processor Datasheet for Industrial Products,
Rev. 2, 11/2022 lists a maximum FlexSPI frequency of 66.666666 MHz for
that mode.

Fixes: dfcd1b6f7620 ("arm64: dts: freescale: add initial device tree for TQMa8MQML with i.MX8MM")
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
Changes in v2:
* Clarify which datasheet is referred to
* Add Fixes tag

 arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
index 1b5ba3c47164f..48285bcbe9bbb 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
@@ -60,7 +60,7 @@ &flexspi {
 	flash0: flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <84000000>;
+		spi-max-frequency = <66666666>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
 		vcc-supply = <&buck5_reg>;
-- 
2.55.0

[PATCH v2 2/3] arm64: dts: imx8mn-tqma8mqnl: restrict clock for SPI-NOR flash

[Alexander Stein]

From: Markus Niebel <Markus.Niebel@ew.tq-group.com>

The FlexSPI controller uses quad SPI with internal clock recovery.
The i.MX 8M Nano Applications Processor Datasheet for Industrial Products,
Rev. 5, 09/2022 lists a maximum FlexSPI frequency of 66.666666 MHz for
that mode.

Fixes: 3e56e354db6d ("arm64: dts: freescale: add initial device tree for TQMa8MQNL with i.MX8MN")
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
Changes in v2:
* Clarify which datasheet is referred to
* Add Fixes tag

 arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
index 48a687926aa1b..c88d83243097f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
@@ -63,7 +63,7 @@ &flexspi {
 	flash0: flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <84000000>;
+		spi-max-frequency = <66666666>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
 		vcc-supply = <&buck5_reg>;
-- 
2.55.0

[PATCH v2 3/3] arm64: dts: imx8mp-tqma8mpql: restrict clock for SPI-NOR flash

[Alexander Stein]

From: Markus Niebel <Markus.Niebel@ew.tq-group.com>

The FlexSPI controller uses quad SPI with internal clock recovery.
The i.MX 8M Plus Applications Processor Datasheet for Industrial Products,
Rev. 2.2, 09/2024 lists a maximum FlexSPI frequency of 66.666666 MHz for
that mode.

Fixes: 418d1d840e42 ("arm64: dts: freescale: add initial device tree for TQMa8MPQL with i.MX8MP")
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
Changes in v2:
* Clarify which datasheet is referred to
* Add Fixes tag

 arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
index 9716f24f7c6ed..0593bcb450a57 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
@@ -47,7 +47,7 @@ &flexspi {
 	flash0: flash@0 {
 		reg = <0>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <66666666>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
 		vcc-supply = <&buck5_reg>;
-- 
2.55.0

Re: [PATCH v2 1/3] arm64: dts: imx8mm-tqma8mqml: restrict clock for SPI-NOR flash

[Bough Chen]

On Wed, Oct 07, 2026 at 09:20:13AM +0200, Alexander Stein wrote:
> From: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> 
> The FlexSPI controller uses quad SPI with internal clock recovery.
> The i.MX 8M Mini Applications Processor Datasheet for Industrial Products,
> Rev. 2, 11/2022 lists a maximum FlexSPI frequency of 66.666666 MHz for
> that mode.
> 
> Fixes: dfcd1b6f7620 ("arm64: dts: freescale: add initial device tree for TQMa8MQML with i.MX8MM")

There is already one patch to limit the clock rate based on SoCs, refer to:
https://patch.msgid.link/20260728-fspi-clock-v2-1-dbe786a4a6eb@nxp.com

I think the max frequency in the DTS flash node should describe only the
SPI NOR device limitation, not the host limitation.

Regards
Haibo Chen
> Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
> Changes in v2:
> * Clarify which datasheet is referred to
> * Add Fixes tag
> 
>  arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
> index 1b5ba3c47164f..48285bcbe9bbb 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
> @@ -60,7 +60,7 @@ &flexspi {
>  	flash0: flash@0 {
>  		compatible = "jedec,spi-nor";
>  		reg = <0>;
> -		spi-max-frequency = <84000000>;
> +		spi-max-frequency = <66666666>;
>  		spi-tx-bus-width = <1>;
>  		spi-rx-bus-width = <4>;
>  		vcc-supply = <&buck5_reg>;
> -- 
> 2.55.0
> 

Re: [PATCH v2 1/3] arm64: dts: imx8mm-tqma8mqml: restrict clock for SPI-NOR flash

[Alexander Stein]

Hi,

Am Donnerstag, 8. Oktober 2026, 10:34:27 Mitteleuropäische Sommerzeit schrieb Bough Chen:
> On Wed, Oct 07, 2026 at 09:20:13AM +0200, Alexander Stein wrote:
> > From: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> > 
> > The FlexSPI controller uses quad SPI with internal clock recovery.
> > The i.MX 8M Mini Applications Processor Datasheet for Industrial Products,
> > Rev. 2, 11/2022 lists a maximum FlexSPI frequency of 66.666666 MHz for
> > that mode.
> > 
> > Fixes: dfcd1b6f7620 ("arm64: dts: freescale: add initial device tree for TQMa8MQML with i.MX8MM")
> 
> There is already one patch to limit the clock rate based on SoCs, refer to:
> https://patch.msgid.link/20260728-fspi-clock-v2-1-dbe786a4a6eb@nxp.com

Ah, thanks. I wasn't aware of that. Despite that I don't like this just
supports RXCLKSRC 0 and 3 (SDR/DTR), this in deed limits the frequency
already.

> I think the max frequency in the DTS flash node should describe only the
> SPI NOR device limitation, not the host limitation.

True, before there was no limitation like that. But starting with commit
f43579ef35005 ("spi: spi-nxp-fspi: limit the clock rate for different
sample clock source selection") this series is no longer necessary.

Thanks and best regards
Alexander

> Regards
> Haibo Chen
> > Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > ---
> > Changes in v2:
> > * Clarify which datasheet is referred to
> > * Add Fixes tag
> > 
> >  arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
> > index 1b5ba3c47164f..48285bcbe9bbb 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
> > @@ -60,7 +60,7 @@ &flexspi {
> >  	flash0: flash@0 {
> >  		compatible = "jedec,spi-nor";
> >  		reg = <0>;
> > -		spi-max-frequency = <84000000>;
> > +		spi-max-frequency = <66666666>;
> >  		spi-tx-bus-width = <1>;
> >  		spi-rx-bus-width = <4>;
> >  		vcc-supply = <&buck5_reg>;
> 


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