From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Maulik Shah <maulik.shah@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jishnu Prakash <quic_jprakash@quicinc.com>,
Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>,
Taniya Das <quic_tdas@quicinc.com>,
Melody Olvera <quic_molvera@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, quic_lsrao@quicinc.com
Subject: Re: [PATCH] arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states
Date: Fri, 21 Feb 2025 20:51:19 +0100 [thread overview]
Message-ID: <638f05f4-3a0e-459d-aec0-b925ca7f657c@oss.qualcomm.com> (raw)
In-Reply-To: <20250218-sm8750_cluster_idle-v1-1-5529df00f642@oss.qualcomm.com>
On 18.02.2025 7:58 AM, Maulik Shah wrote:
> SM8750 have two different clusters. cluster0 have CPU 0-5 as child and
> cluster1 have CPU 6-7 as child. Each cluster requires its own idle state
> and power domain in order to achieve complete domain sleep state.
>
> However only single cluster idle state is added mapping CPU 0-7 to the
> same power domain. Fix this by correctly mapping each CPU to respective
> cluster power domain and add domain idle state for cluster1.
>
> Fixes: 068c3d3c83be ("arm64: dts: qcom: Add base SM8750 dtsi")
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sm8750.dtsi | 36 +++++++++++++++++++++++++-----------
> 1 file changed, 25 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> index 3bbd7d18598ee0a3a0d5130c03a3166e1fc14d82..3af928be5b68b47988dd55f4add8e3712f07d5ab 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> @@ -178,7 +178,15 @@ cluster1_c4: cpu-sleep-1 {
> };
>
> domain-idle-states {
> - cluster_cl5: cluster-sleep-0 {
> + cluster0_cl5: cluster-sleep-0 {
> + compatible = "domain-idle-state";
> + arm,psci-suspend-param = <0x01000054>;
> + entry-latency-us = <2150>;
> + exit-latency-us = <1983>;
> + min-residency-us = <9144>;
> + };
I don't think this is necessary, you should be gtg with just creating the
new power domain for cluster 0/1 and pointing both to the same cluster idle
state (unless they both need different latency numbers
Konrad
next prev parent reply other threads:[~2025-02-21 19:51 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-18 6:58 Maulik Shah
2025-02-21 19:51 ` Konrad Dybcio [this message]
2025-02-26 5:48 ` Maulik Shah (mkshah)
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