Re: [PATCH 5/6] arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 22/11/2023 20:14, Krishna Kurapati wrote:
> For sm6350/sdm670/sdm845, although they are qusb2 phy targets, dp/dm
> interrupts are used for wakeup instead of qusb2_phy irq. These targets
> were part of a generation that were the last ones to implement QUSB2 PHY
> and the design incorporated dedicated DP/DM interrupts which eventually
> carried forward to the newer femto based targets.
> 
> Add the missing pwr_event irq for these targets.
> 
> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sdm670.dtsi |  5 ++++-
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++--
>  arch/arm64/boot/dts/qcom/sm6350.dtsi |  7 +++++--
>  3 files changed, 17 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> index 6d9843d05cb3..b8888f71b1d6 100644
> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> @@ -1296,10 +1296,13 @@ usb_1: usb@a6f8800 {
>  			assigned-clock-rates = <19200000>, <150000000>;
>  
>  			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "hs_phy_irq", "ss_phy_irq",
> +			interrupt-names = "hs_phy_irq",
> +					  "pwr_event",
> +					  "ss_phy_irq",
>  					  "dm_hs_phy_irq", "dp_hs_phy_irq";

New entries should be added usually to the end of the list. Commit msg
does not explain this to me why new entry is in the middle of the list.

Best regards,
Krzysztof