* [PATCH 5/6] arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350
@ 2023-11-22 19:14 Krishna Kurapati
2023-11-23 8:51 ` Krzysztof Kozlowski
0 siblings, 1 reply; 3+ messages in thread
From: Krishna Kurapati @ 2023-11-22 19:14 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, quic_ppratap,
quic_jackp, quic_wcheng, Krishna Kurapati
For sm6350/sdm670/sdm845, although they are qusb2 phy targets, dp/dm
interrupts are used for wakeup instead of qusb2_phy irq. These targets
were part of a generation that were the last ones to implement QUSB2 PHY
and the design incorporated dedicated DP/DM interrupts which eventually
carried forward to the newer femto based targets.
Add the missing pwr_event irq for these targets.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
---
arch/arm64/boot/dts/qcom/sdm670.dtsi | 5 ++++-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++--
arch/arm64/boot/dts/qcom/sm6350.dtsi | 7 +++++--
3 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 6d9843d05cb3..b8888f71b1d6 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -1296,10 +1296,13 @@ usb_1: usb@a6f8800 {
assigned-clock-rates = <19200000>, <150000000>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
+ interrupt-names = "hs_phy_irq",
+ "pwr_event",
+ "ss_phy_irq",
"dm_hs_phy_irq", "dp_hs_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index bf5e6eb9d313..c3e90e54e329 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4054,10 +4054,13 @@ usb_1: usb@a6f8800 {
assigned-clock-rates = <19200000>, <150000000>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
+ interrupt-names = "hs_phy_irq",
+ "pwr_event",
+ "ss_phy_irq",
"dm_hs_phy_irq", "dp_hs_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
@@ -4105,10 +4108,13 @@ usb_2: usb@a8f8800 {
assigned-clock-rates = <19200000>, <150000000>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
+ interrupt-names = "hs_phy_irq",
+ "pwr_event",
+ "ss_phy_irq",
"dm_hs_phy_irq", "dp_hs_phy_irq";
power-domains = <&gcc USB30_SEC_GDSC>;
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8fd6f4d03490..af788e30eb45 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1839,12 +1839,15 @@ usb_1: usb@a6f8800 {
"sleep",
"mock_utmi";
- interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 14 IRQ_TYPE_EDGE_BOTH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
+ interrupt-names = "hs_phy_irq",
+ "pwr_event",
+ "ss_phy_irq",
"dm_hs_phy_irq", "dp_hs_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
--
2.42.0
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 5/6] arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350
2023-11-22 19:14 [PATCH 5/6] arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350 Krishna Kurapati
@ 2023-11-23 8:51 ` Krzysztof Kozlowski
2023-11-23 9:12 ` Krishna Kurapati PSSNV
0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-23 8:51 UTC (permalink / raw)
To: Krishna Kurapati, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, quic_ppratap,
quic_jackp, quic_wcheng
On 22/11/2023 20:14, Krishna Kurapati wrote:
> For sm6350/sdm670/sdm845, although they are qusb2 phy targets, dp/dm
> interrupts are used for wakeup instead of qusb2_phy irq. These targets
> were part of a generation that were the last ones to implement QUSB2 PHY
> and the design incorporated dedicated DP/DM interrupts which eventually
> carried forward to the newer femto based targets.
>
> Add the missing pwr_event irq for these targets.
>
> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sdm670.dtsi | 5 ++++-
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++--
> arch/arm64/boot/dts/qcom/sm6350.dtsi | 7 +++++--
> 3 files changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> index 6d9843d05cb3..b8888f71b1d6 100644
> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> @@ -1296,10 +1296,13 @@ usb_1: usb@a6f8800 {
> assigned-clock-rates = <19200000>, <150000000>;
>
> interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "hs_phy_irq", "ss_phy_irq",
> + interrupt-names = "hs_phy_irq",
> + "pwr_event",
> + "ss_phy_irq",
> "dm_hs_phy_irq", "dp_hs_phy_irq";
New entries should be added usually to the end of the list. Commit msg
does not explain this to me why new entry is in the middle of the list.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 5/6] arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350
2023-11-23 8:51 ` Krzysztof Kozlowski
@ 2023-11-23 9:12 ` Krishna Kurapati PSSNV
0 siblings, 0 replies; 3+ messages in thread
From: Krishna Kurapati PSSNV @ 2023-11-23 9:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, quic_ppratap,
quic_jackp, quic_wcheng
On 11/23/2023 2:21 PM, Krzysztof Kozlowski wrote:
> On 22/11/2023 20:14, Krishna Kurapati wrote:
>> For sm6350/sdm670/sdm845, although they are qusb2 phy targets, dp/dm
>> interrupts are used for wakeup instead of qusb2_phy irq. These targets
>> were part of a generation that were the last ones to implement QUSB2 PHY
>> and the design incorporated dedicated DP/DM interrupts which eventually
>> carried forward to the newer femto based targets.
>>
>> Add the missing pwr_event irq for these targets.
>>
>> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sdm670.dtsi | 5 ++++-
>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++--
>> arch/arm64/boot/dts/qcom/sm6350.dtsi | 7 +++++--
>> 3 files changed, 17 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
>> index 6d9843d05cb3..b8888f71b1d6 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
>> @@ -1296,10 +1296,13 @@ usb_1: usb@a6f8800 {
>> assigned-clock-rates = <19200000>, <150000000>;
>>
>> interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
>> - interrupt-names = "hs_phy_irq", "ss_phy_irq",
>> + interrupt-names = "hs_phy_irq",
>> + "pwr_event",
>> + "ss_phy_irq",
>> "dm_hs_phy_irq", "dp_hs_phy_irq";
>
> New entries should be added usually to the end of the list. Commit msg
> does not explain this to me why new entry is in the middle of the list.
>
Actually there is no proper rationale from my end why I added them in
middle. The only reason I did it was that because in many places the
interrupt was mis-named or missing. So when making changes, I just put
the missing interrupt next to hs_phy_irq. But my reasoning doesn't make
much sense. Sorry for that.
Thanks for the review. Will put the extra interrupt at the end.
Regards,
Krishna,
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-11-23 9:13 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2023-11-22 19:14 [PATCH 5/6] arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350 Krishna Kurapati
2023-11-23 8:51 ` Krzysztof Kozlowski
2023-11-23 9:12 ` Krishna Kurapati PSSNV
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