From: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, andersson@kernel.org,
konradybcio@kernel.org
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Abel Vesa <abel.vesa@linaro.org>,
Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Subject: Re: [PATCH v3 1/2] dt-bindings: mmc: sdhci-msm: Add ICE phandle
Date: Mon, 16 Feb 2026 16:35:22 +0530 [thread overview]
Message-ID: <640e2eca-1656-1723-38e8-d6cd97e6e2e3@oss.qualcomm.com> (raw)
In-Reply-To: <b6e510da-b369-4c43-b9a1-455478af4948@kernel.org>
On 2/6/2026 4:56 PM, Krzysztof Kozlowski wrote:
> On 06/02/2026 12:20, Neeraj Soni wrote:
>> Starting with sc7280(kodiak), the ICE will have its own device-tree node.
>> So add the qcom,ice property to reference it.
>>
>> Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
>> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
>> Co-developed-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
>> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
>> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
>>
>> ---
>>
>> Some initial work is done by Abel here:
>> https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/
>> and by Abhinaba here:
>> https://lore.kernel.org/all/20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-1-2a34d8d03c72@oss.qualcomm.com/
>>
>> This patch adds the purpose and usage for phandle in the description and encodes
>> it properly in the schema.
>> ---
>> .../devicetree/bindings/mmc/sdhci-msm.yaml | 26 +++++++++++++++++++
>> 1 file changed, 26 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>> index 938be8228d66..f35b675c9f16 100644
>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>> @@ -140,6 +140,12 @@ properties:
>> $ref: /schemas/types.yaml#/definitions/uint32
>> description: platform specific settings for DLL_CONFIG reg.
>>
>> + qcom,ice:
>> + $ref: /schemas/types.yaml#/definitions/phandle
>> + description: |
>> + phandle to the Inline Crypto Engine node. ICE having its own platform driver will use this phandle to
>
> Please wrap code according to the preferred limit expressed in Kernel
> coding style (checkpatch is not a coding style description, but only a
> tool). However don't wrap blindly (see Kernel coding style).
>
Sure. While executing dt_binding_check the tool reported max limit as 110 characters so i wrapped
around it. I will consolidate the description to single line in next patch.
> Do not need '|' unless you need to preserve formatting.
>
Ack. I will limit the description to single line.
>
> I do not understand the platform driver reference here. You are supposed
> to explain how the hardware uses it, for what purpose. If I change Linux
> to use auxilary driver, then the binding is incorrect?
>
>
>> + manage its resources independently. Either add this phandle or ICE address space for ICE to work.
>
> Don't repeat constraints in free form text>
Ack. Will fix in next patch.
> Such trivialities should not happen, I am sometimes skipping deep dive
> review, so I skipped the rest.
>
> :
>
>
> Best regards,
> Krzysztof
>
Best Regards,
Neeraj
next prev parent reply other threads:[~2026-02-16 11:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-06 11:20 [PATCH v3 0/2] Enable Inline crypto engine for kodiak Neeraj Soni
2026-02-06 11:20 ` [PATCH v3 1/2] dt-bindings: mmc: sdhci-msm: Add ICE phandle Neeraj Soni
2026-02-06 11:26 ` Krzysztof Kozlowski
2026-02-16 11:05 ` Neeraj Soni [this message]
2026-02-16 11:08 ` Krzysztof Kozlowski
2026-02-06 11:20 ` [PATCH v3 2/2] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC Neeraj Soni
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