From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Jesse Casco <jesse.casco@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Sudeep Holla <sudeep.holla@arm.com>,
Cristian Marussi <cristian.marussi@arm.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: glymur: use polling mode for SCMI transfers
Date: Tue, 18 Aug 2026 11:29:06 +0200 [thread overview]
Message-ID: <642652c2-af5d-446c-ac1a-8099639c2588@oss.qualcomm.com> (raw)
In-Reply-To: <20260808172211.137577-1-jesse.casco@gmail.com>
On 8/8/26 7:22 PM, Jesse Casco wrote:
> On glymur the CPUCP firmware writes correct SCMI replies into the shared
> memory but never rings the mailbox doorbell for them. Every transfer that
> waits for the completion interrupt therefore times out, scmi-cpufreq
> fails to probe with -110, and the machine ends up with no cpufreq at all
> -- all CPUs pinned at their boot OPP.
I'm not seeing this issue, but I heard others hit it, possibly due to some
timing bug. If you set your kernel config to build all drivers in (i.e.
change =m to =y), do you still face this?
Konrad
next prev parent reply other threads:[~2026-08-18 9:29 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-08 17:22 Jesse Casco
2026-08-18 9:29 ` Konrad Dybcio [this message]
2026-08-19 14:52 ` Jesse Casco
2026-11-10 20:05 ` Jesse Casco
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