[PATCH v4 0/6] bus: mhi: host: Enable SRIOV support in MHI driver

[PATCH v4 0/6] bus: mhi: host: Enable SRIOV support in MHI driver

[Vivek.Pernamitta]

This patch introduces several enhancements for the SRIOV support in MHI driver
focusing on enabling SRIOV and improving the MHI driver removal process.

- Add support to enable SRIOV.

- Remove health check monitor for VF's and read PF's device id for VF.

- Implement support for separate controller configurations for both
  Virtual Functions (VF) and Physical Functions (PF).
  The PF takes on a supervisory role and will have bootup information
  such as SAHARA, DIAG, and NDB (for file system sync data, etc.).
  VFs can handle function-specific data transfers, such as data plane
  or hardware data.

- Perform a graceful removal of the MHI driver. Upon driver removal,
  the host driver will perform a SOC_RESET on the driver remove callback.
  This ensures device reset gracefully.
  
- Add support in mhi power up to handle sys_err state instread of treating
  as error.
  In power-up or recovery scenarios, the device may enter a valid SYS_ERR
  state due to a prior reset. Currently, mhi_sync_power_up() exits early
  when this state is detected, causing recovery to fail. This change
  ensures the host waits for the device to transition to Mission Mode even
  after SYS_ERR, allowing proper error handling and recovery.

- Add Support to configure DMA mask for VFs expliclty for QDU100.

Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
---
changes in v4:
- updated commit messages as per Mani's comments
- update macro name MHI_PM_IN_UNRECOVERABLE_STATE to MHI_PM_FATAL_ERROR
- Added return type and inline comments which got removed.
- link to V3: https://lore.kernel.org/mhi/20250821-vdev_next-20250821_sriov-v3-0-e1b017c48d4a@quicinc.com/T/#m6552b907b0c58d5ebd1d3019ea0a446d09210367

Changes in v3:
- Updated commit messages for individual gerrits as per Konrad and Mani
- Disabled health check moniter for VF.
- reordered patchset 3 and 4.
- Removed empty lines, unsymmetric functions, comments and alinged mhi_pci_driver structure 
- Renamed struct member from reset_on_driver_unbind to reset_on_remove.
- Added support for higher DMA mask for VFs on QDU100.

Changes in v2:
- Changed order of patchsets from V1 as per Konrad comments.
- Added spec version for separate controller configurations for both VF andi
  PF as per Krishna comments.
- Updated git commit message as per Krishna comments..
- Added mhi_pci_remove in shutdown callback in pci_generic instead of
  duplicating the same sequence in both as per Krishna comments..
- Link to v1: https://lore.kernel.org/r/20250703-sriov_vdev_next-20250630-v1-0-87071d1047e3@quicinc.com
---

---
Vivek Pernamitta (6):
      bus: mhi: host: Add support for separate controller configurations for VF and PF
      bus: mhi: host: pci_generic: Read SUBSYSTEM_VENDOR_ID for VF's to check status
      bus: mhi: host: pci_generic: Add SRIOV support
      bus: mhi: host: pci_generic: Remove MHI driver and ensure graceful device recovery
      bus: mhi: core: Improve mhi_sync_power_up handling for SYS_ERR state
      bus: mhi: host: pci_generic: Support independent DMA mask for VFs

 drivers/bus/mhi/host/internal.h    |  2 ++
 drivers/bus/mhi/host/pci_generic.c | 69 ++++++++++++++++++++++++++++++--------
 drivers/bus/mhi/host/pm.c          |  2 +-
 3 files changed, 58 insertions(+), 15 deletions(-)
---
base-commit: 8f21d9da46702c4d6951ba60ca8a05f42870fe8f
change-id: 20250912-uevent_vdev_next-20250911-cbb99ff802ee

Best regards,
-- 
Vivek Pernamitta <<quic_vpernami@quicinc.com>>

[PATCH v4 1/6] bus: mhi: host: Add support for separate controller configurations for VF and PF

[Vivek.Pernamitta]

From: Vivek Pernamitta <quic_vpernami@quicinc.com>

Implement support for separate controller configurations for both
Virtual Functions (VF) and Physical Functions (PF).

This enhancement allows for more flexible and efficient management of
resources. The PF takes on a supervisory role and will have bootup
information such as SAHARA, DIAG, and NDB (for file system sync data,
etc.). VFs can handle resources associated with the main data movement
of the Function are available to the SI (system image) as per PCIe SRIOV
spec (rev 0.9 1.Architectural overview)

Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
 drivers/bus/mhi/host/pci_generic.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 4564e2528775ed9f4ee6fe3dcbb2cd90b1966016..8a605cb3b8e1e54ef4e699700f3f2660ad5cb093 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -34,6 +34,7 @@
 /**
  * struct mhi_pci_dev_info - MHI PCI device specific information
  * @config: MHI controller configuration
+ * @vf_config: MHI controller configuration for Virtual function (optional)
  * @name: name of the PCI module
  * @fw: firmware path (if any)
  * @edl: emergency download mode firmware path (if any)
@@ -47,6 +48,7 @@
  */
 struct mhi_pci_dev_info {
 	const struct mhi_controller_config *config;
+	const struct mhi_controller_config *vf_config;
 	const char *name;
 	const char *fw;
 	const char *edl;
@@ -1299,9 +1301,14 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 		return -ENOMEM;
 
 	INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work);
+
+	if (pdev->is_virtfn && info->vf_config)
+		mhi_cntrl_config = info->vf_config;
+	else
+		mhi_cntrl_config = info->config;
+
 	timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
 
-	mhi_cntrl_config = info->config;
 	mhi_cntrl = &mhi_pdev->mhi_cntrl;
 
 	mhi_cntrl->cntrl_dev = &pdev->dev;

-- 
2.34.1

[PATCH v4 2/6] bus: mhi: host: pci_generic: Read SUBSYSTEM_VENDOR_ID for VF's to check status

[Vivek.Pernamitta]

From: Vivek Pernamitta <quic_vpernami@quicinc.com>

In SR-IOV enabled devices, reading the VF DEVICE/VENDOR ID register
returns `FFFFh`, as specified in section 3.4.1.1 of the PCIe SR-IOV spec.
To accurately determine device activity, read the PCIe VENDOR_ID of
the Physical Function (PF) instead.
Health check monitoring for Virtual Functions (VFs) has been disabled,
since VFs are not physical functions and lack direct hardware control.
This change prevents unnecessary CPU cycles from being consumed by VF
health checks, which are both unintended and non-functional.

Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
 drivers/bus/mhi/host/pci_generic.c | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 8a605cb3b8e1e54ef4e699700f3f2660ad5cb093..6fa16975e320212a50e0b68ddb34db5ce711589c 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -1082,7 +1082,7 @@ static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl)
 	struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);
 	u16 vendor = 0;
 
-	if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor))
+	if (pci_read_config_word(pci_physfn(pdev), PCI_VENDOR_ID, &vendor))
 		return false;
 
 	if (vendor == (u16) ~0 || vendor == 0)
@@ -1193,7 +1193,9 @@ static void mhi_pci_recovery_work(struct work_struct *work)
 
 	dev_warn(&pdev->dev, "device recovery started\n");
 
-	timer_delete(&mhi_pdev->health_check_timer);
+	if (pdev->is_physfn)
+		timer_delete(&mhi_pdev->health_check_timer);
+
 	pm_runtime_forbid(&pdev->dev);
 
 	/* Clean up MHI state */
@@ -1220,7 +1222,10 @@ static void mhi_pci_recovery_work(struct work_struct *work)
 	dev_dbg(&pdev->dev, "Recovery completed\n");
 
 	set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
-	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
+
+	if (pdev->is_physfn)
+		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
+
 	return;
 
 err_unprepare:
@@ -1307,7 +1312,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	else
 		mhi_cntrl_config = info->config;
 
-	timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
+	/* Initialize health check monitor only for Physical functions */
+	if (pdev->is_physfn)
+		timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
 
 	mhi_cntrl = &mhi_pdev->mhi_cntrl;
 
@@ -1371,7 +1378,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
 
 	/* start health check */
-	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
+	if (pdev->is_physfn)
+		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
 
 	/* Allow runtime suspend only if both PME from D3Hot and M3 are supported */
 	if (pci_pme_capable(pdev, PCI_D3hot) && !(info->no_m3)) {
@@ -1396,7 +1404,8 @@ static void mhi_pci_remove(struct pci_dev *pdev)
 	struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev);
 	struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl;
 
-	timer_delete_sync(&mhi_pdev->health_check_timer);
+	if (pdev->is_physfn)
+		timer_delete_sync(&mhi_pdev->health_check_timer);
 	cancel_work_sync(&mhi_pdev->recovery_work);
 
 	if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
@@ -1424,7 +1433,8 @@ static void mhi_pci_reset_prepare(struct pci_dev *pdev)
 
 	dev_info(&pdev->dev, "reset\n");
 
-	timer_delete(&mhi_pdev->health_check_timer);
+	if (pdev->is_physfn)
+		timer_delete(&mhi_pdev->health_check_timer);
 
 	/* Clean up MHI state */
 	if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
@@ -1469,7 +1479,8 @@ static void mhi_pci_reset_done(struct pci_dev *pdev)
 	}
 
 	set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
-	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
+	if (pdev->is_physfn)
+		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
 }
 
 static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev,
@@ -1534,7 +1545,9 @@ static int  __maybe_unused mhi_pci_runtime_suspend(struct device *dev)
 	if (test_and_set_bit(MHI_PCI_DEV_SUSPENDED, &mhi_pdev->status))
 		return 0;
 
-	timer_delete(&mhi_pdev->health_check_timer);
+	if (pdev->is_physfn)
+		timer_delete(&mhi_pdev->health_check_timer);
+
 	cancel_work_sync(&mhi_pdev->recovery_work);
 
 	if (!test_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status) ||
@@ -1585,7 +1598,8 @@ static int __maybe_unused mhi_pci_runtime_resume(struct device *dev)
 	}
 
 	/* Resume health check */
-	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
+	if (pdev->is_physfn)
+		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
 
 	/* It can be a remote wakeup (no mhi runtime_get), update access time */
 	pm_runtime_mark_last_busy(dev);

-- 
2.34.1

Re: [PATCH v4 2/6] bus: mhi: host: pci_generic: Read SUBSYSTEM_VENDOR_ID for VF's to check status

[Krishna Chaitanya Chundru]

On 9/12/2025 6:18 PM, Vivek.Pernamitta@quicinc.com wrote:
> From: Vivek Pernamitta <quic_vpernami@quicinc.com>
> 
> In SR-IOV enabled devices, reading the VF DEVICE/VENDOR ID register
> returns `FFFFh`, as specified in section 3.4.1.1 of the PCIe SR-IOV spec.
> To accurately determine device activity, read the PCIe VENDOR_ID of
> the Physical Function (PF) insteadcommit text and subject needs to be modified to reflect new changes

> Health check monitoring for Virtual Functions (VFs) has been disabled,
> since VFs are not physical functions and lack direct hardware control.
> This change prevents unnecessary CPU cycles from being consumed by VF
> health checks, which are both unintended and non-functional.
> 
> Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
>   drivers/bus/mhi/host/pci_generic.c | 34 ++++++++++++++++++++++++----------
>   1 file changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
> index 8a605cb3b8e1e54ef4e699700f3f2660ad5cb093..6fa16975e320212a50e0b68ddb34db5ce711589c 100644
> --- a/drivers/bus/mhi/host/pci_generic.c
> +++ b/drivers/bus/mhi/host/pci_generic.c
> @@ -1082,7 +1082,7 @@ static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl)
>   	struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);
>   	u16 vendor = 0;
>   
> -	if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor))
> +	if (pci_read_config_word(pci_physfn(pdev), PCI_VENDOR_ID, &vendor))
As you are invoking only for physical functions pci_physfn is not needed.

- Krishna Chaitanya
>   		return false;
>   
>   	if (vendor == (u16) ~0 || vendor == 0)
> @@ -1193,7 +1193,9 @@ static void mhi_pci_recovery_work(struct work_struct *work)
>   
>   	dev_warn(&pdev->dev, "device recovery started\n");
>   
> -	timer_delete(&mhi_pdev->health_check_timer);
> +	if (pdev->is_physfn)
> +		timer_delete(&mhi_pdev->health_check_timer);
> +
>   	pm_runtime_forbid(&pdev->dev);
>   
>   	/* Clean up MHI state */
> @@ -1220,7 +1222,10 @@ static void mhi_pci_recovery_work(struct work_struct *work)
>   	dev_dbg(&pdev->dev, "Recovery completed\n");
>   
>   	set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
> -	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
> +
> +	if (pdev->is_physfn)
> +		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
> +
>   	return;
>   
>   err_unprepare:
> @@ -1307,7 +1312,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>   	else
>   		mhi_cntrl_config = info->config;
>   
> -	timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
> +	/* Initialize health check monitor only for Physical functions */
> +	if (pdev->is_physfn)
> +		timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
>   
>   	mhi_cntrl = &mhi_pdev->mhi_cntrl;
>   
> @@ -1371,7 +1378,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>   	set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
>   
>   	/* start health check */
> -	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
> +	if (pdev->is_physfn)
> +		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
>   
>   	/* Allow runtime suspend only if both PME from D3Hot and M3 are supported */
>   	if (pci_pme_capable(pdev, PCI_D3hot) && !(info->no_m3)) {
> @@ -1396,7 +1404,8 @@ static void mhi_pci_remove(struct pci_dev *pdev)
>   	struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev);
>   	struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl;
>   
> -	timer_delete_sync(&mhi_pdev->health_check_timer);
> +	if (pdev->is_physfn)
> +		timer_delete_sync(&mhi_pdev->health_check_timer);
>   	cancel_work_sync(&mhi_pdev->recovery_work);
>   
>   	if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
> @@ -1424,7 +1433,8 @@ static void mhi_pci_reset_prepare(struct pci_dev *pdev)
>   
>   	dev_info(&pdev->dev, "reset\n");
>   
> -	timer_delete(&mhi_pdev->health_check_timer);
> +	if (pdev->is_physfn)
> +		timer_delete(&mhi_pdev->health_check_timer);
>   
>   	/* Clean up MHI state */
>   	if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
> @@ -1469,7 +1479,8 @@ static void mhi_pci_reset_done(struct pci_dev *pdev)
>   	}
>   
>   	set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
> -	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
> +	if (pdev->is_physfn)
> +		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
>   }
>   
>   static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev,
> @@ -1534,7 +1545,9 @@ static int  __maybe_unused mhi_pci_runtime_suspend(struct device *dev)
>   	if (test_and_set_bit(MHI_PCI_DEV_SUSPENDED, &mhi_pdev->status))
>   		return 0;
>   
> -	timer_delete(&mhi_pdev->health_check_timer);
> +	if (pdev->is_physfn)
> +		timer_delete(&mhi_pdev->health_check_timer);
> +
>   	cancel_work_sync(&mhi_pdev->recovery_work);
>   
>   	if (!test_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status) ||
> @@ -1585,7 +1598,8 @@ static int __maybe_unused mhi_pci_runtime_resume(struct device *dev)
>   	}
>   
>   	/* Resume health check */
> -	mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
> +	if (pdev->is_physfn)
> +		mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD);
>   
>   	/* It can be a remote wakeup (no mhi runtime_get), update access time */
>   	pm_runtime_mark_last_busy(dev);
> 

Re: [PATCH v4 2/6] bus: mhi: host: pci_generic: Read SUBSYSTEM_VENDOR_ID for VF's to check status

[Vivek Pernamitta]

On 9/15/2025 2:22 PM, Krishna Chaitanya Chundru wrote:
> 
> 
> On 9/12/2025 6:18 PM, Vivek.Pernamitta@quicinc.com wrote:
>> From: Vivek Pernamitta <quic_vpernami@quicinc.com>
>>
>> In SR-IOV enabled devices, reading the VF DEVICE/VENDOR ID register
>> returns `FFFFh`, as specified in section 3.4.1.1 of the PCIe SR-IOV spec.
>> To accurately determine device activity, read the PCIe VENDOR_ID of
>> the Physical Function (PF) insteadcommit text and subject needs to be 
>> modified to reflect new changes
> 
>> Health check monitoring for Virtual Functions (VFs) has been disabled,
>> since VFs are not physical functions and lack direct hardware control.
>> This change prevents unnecessary CPU cycles from being consumed by VF
>> health checks, which are both unintended and non-functional.
>>
>> Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
>> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>> ---
>>   drivers/bus/mhi/host/pci_generic.c | 34 +++++++++++++++++++++++ 
>> +----------
>>   1 file changed, 24 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/ 
>> host/pci_generic.c
>> index 
>> 8a605cb3b8e1e54ef4e699700f3f2660ad5cb093..6fa16975e320212a50e0b68ddb34db5ce711589c 100644
>> --- a/drivers/bus/mhi/host/pci_generic.c
>> +++ b/drivers/bus/mhi/host/pci_generic.c
>> @@ -1082,7 +1082,7 @@ static bool mhi_pci_is_alive(struct 
>> mhi_controller *mhi_cntrl)
>>       struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);
>>       u16 vendor = 0;
>> -    if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor))
>> +    if (pci_read_config_word(pci_physfn(pdev), PCI_VENDOR_ID, &vendor))
> As you are invoking only for physical functions pci_physfn is not needed.
> 
> - Krishna Chaitanya
pci_physfn(pdev) was intentionally kept as this can be called for VF's
in error handle path. >>           return false;
>>       if (vendor == (u16) ~0 || vendor == 0)
>> @@ -1193,7 +1193,9 @@ static void mhi_pci_recovery_work(struct 
>> work_struct *work)
>>       dev_warn(&pdev->dev, "device recovery started\n");
>> -    timer_delete(&mhi_pdev->health_check_timer);
>> +    if (pdev->is_physfn)
>> +        timer_delete(&mhi_pdev->health_check_timer);
>> +
>>       pm_runtime_forbid(&pdev->dev);
>>       /* Clean up MHI state */
>> @@ -1220,7 +1222,10 @@ static void mhi_pci_recovery_work(struct 
>> work_struct *work)
>>       dev_dbg(&pdev->dev, "Recovery completed\n");
>>       set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>> +
>> +    if (pdev->is_physfn)
>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>> +
>>       return;
>>   err_unprepare:
>> @@ -1307,7 +1312,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, 
>> const struct pci_device_id *id)
>>       else
>>           mhi_cntrl_config = info->config;
>> -    timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
>> +    /* Initialize health check monitor only for Physical functions */
>> +    if (pdev->is_physfn)
>> +        timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
>>       mhi_cntrl = &mhi_pdev->mhi_cntrl;
>> @@ -1371,7 +1378,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, 
>> const struct pci_device_id *id)
>>       set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
>>       /* start health check */
>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>> +    if (pdev->is_physfn)
>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>>       /* Allow runtime suspend only if both PME from D3Hot and M3 are 
>> supported */
>>       if (pci_pme_capable(pdev, PCI_D3hot) && !(info->no_m3)) {
>> @@ -1396,7 +1404,8 @@ static void mhi_pci_remove(struct pci_dev *pdev)
>>       struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev);
>>       struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl;
>> -    timer_delete_sync(&mhi_pdev->health_check_timer);
>> +    if (pdev->is_physfn)
>> +        timer_delete_sync(&mhi_pdev->health_check_timer);
>>       cancel_work_sync(&mhi_pdev->recovery_work);
>>       if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
>> @@ -1424,7 +1433,8 @@ static void mhi_pci_reset_prepare(struct pci_dev 
>> *pdev)
>>       dev_info(&pdev->dev, "reset\n");
>> -    timer_delete(&mhi_pdev->health_check_timer);
>> +    if (pdev->is_physfn)
>> +        timer_delete(&mhi_pdev->health_check_timer);
>>       /* Clean up MHI state */
>>       if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
>> @@ -1469,7 +1479,8 @@ static void mhi_pci_reset_done(struct pci_dev 
>> *pdev)
>>       }
>>       set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>> +    if (pdev->is_physfn)
>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>>   }
>>   static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev,
>> @@ -1534,7 +1545,9 @@ static int  __maybe_unused 
>> mhi_pci_runtime_suspend(struct device *dev)
>>       if (test_and_set_bit(MHI_PCI_DEV_SUSPENDED, &mhi_pdev->status))
>>           return 0;
>> -    timer_delete(&mhi_pdev->health_check_timer);
>> +    if (pdev->is_physfn)
>> +        timer_delete(&mhi_pdev->health_check_timer);
>> +
>>       cancel_work_sync(&mhi_pdev->recovery_work);
>>       if (!test_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status) ||
>> @@ -1585,7 +1598,8 @@ static int __maybe_unused 
>> mhi_pci_runtime_resume(struct device *dev)
>>       }
>>       /* Resume health check */
>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>> +    if (pdev->is_physfn)
>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>> HEALTH_CHECK_PERIOD);
>>       /* It can be a remote wakeup (no mhi runtime_get), update access 
>> time */
>>       pm_runtime_mark_last_busy(dev);
>>

Re: [PATCH v4 2/6] bus: mhi: host: pci_generic: Read SUBSYSTEM_VENDOR_ID for VF's to check status

[Krishna Chaitanya Chundru]

On 9/15/2025 4:19 PM, Vivek Pernamitta wrote:
> 
> 
> On 9/15/2025 2:22 PM, Krishna Chaitanya Chundru wrote:
>>
>>
>> On 9/12/2025 6:18 PM, Vivek.Pernamitta@quicinc.com wrote:
>>> From: Vivek Pernamitta <quic_vpernami@quicinc.com>
>>>
>>> In SR-IOV enabled devices, reading the VF DEVICE/VENDOR ID register
>>> returns `FFFFh`, as specified in section 3.4.1.1 of the PCIe SR-IOV 
>>> spec.
>>> To accurately determine device activity, read the PCIe VENDOR_ID of
>>> the Physical Function (PF) insteadcommit text and subject needs to be 
>>> modified to reflect new changes
>>
>>> Health check monitoring for Virtual Functions (VFs) has been disabled,
>>> since VFs are not physical functions and lack direct hardware control.
>>> This change prevents unnecessary CPU cycles from being consumed by VF
>>> health checks, which are both unintended and non-functional.
>>>
>>> Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
>>> Reviewed-by: Krishna Chaitanya Chundru 
>>> <krishna.chundru@oss.qualcomm.com>
>>> ---
>>>   drivers/bus/mhi/host/pci_generic.c | 34 +++++++++++++++++++++++ 
>>> +----------
>>>   1 file changed, 24 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/ 
>>> host/pci_generic.c
>>> index 
>>> 8a605cb3b8e1e54ef4e699700f3f2660ad5cb093..6fa16975e320212a50e0b68ddb34db5ce711589c 100644
>>> --- a/drivers/bus/mhi/host/pci_generic.c
>>> +++ b/drivers/bus/mhi/host/pci_generic.c
>>> @@ -1082,7 +1082,7 @@ static bool mhi_pci_is_alive(struct 
>>> mhi_controller *mhi_cntrl)
>>>       struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);
>>>       u16 vendor = 0;
>>> -    if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor))
>>> +    if (pci_read_config_word(pci_physfn(pdev), PCI_VENDOR_ID, &vendor))
>> As you are invoking only for physical functions pci_physfn is not needed.
>>
>> - Krishna Chaitanya
> pci_physfn(pdev) was intentionally kept as this can be called for VF's
> in error handle path. >>           return false;
can you include that in the commit text.

- Krishna Chaitanya.
>>>       if (vendor == (u16) ~0 || vendor == 0)
>>> @@ -1193,7 +1193,9 @@ static void mhi_pci_recovery_work(struct 
>>> work_struct *work)
>>>       dev_warn(&pdev->dev, "device recovery started\n");
>>> -    timer_delete(&mhi_pdev->health_check_timer);
>>> +    if (pdev->is_physfn)
>>> +        timer_delete(&mhi_pdev->health_check_timer);
>>> +
>>>       pm_runtime_forbid(&pdev->dev);
>>>       /* Clean up MHI state */
>>> @@ -1220,7 +1222,10 @@ static void mhi_pci_recovery_work(struct 
>>> work_struct *work)
>>>       dev_dbg(&pdev->dev, "Recovery completed\n");
>>>       set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
>>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>> +
>>> +    if (pdev->is_physfn)
>>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>> +
>>>       return;
>>>   err_unprepare:
>>> @@ -1307,7 +1312,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, 
>>> const struct pci_device_id *id)
>>>       else
>>>           mhi_cntrl_config = info->config;
>>> -    timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
>>> +    /* Initialize health check monitor only for Physical functions */
>>> +    if (pdev->is_physfn)
>>> +        timer_setup(&mhi_pdev->health_check_timer, health_check, 0);
>>>       mhi_cntrl = &mhi_pdev->mhi_cntrl;
>>> @@ -1371,7 +1378,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, 
>>> const struct pci_device_id *id)
>>>       set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
>>>       /* start health check */
>>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>> +    if (pdev->is_physfn)
>>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>>       /* Allow runtime suspend only if both PME from D3Hot and M3 are 
>>> supported */
>>>       if (pci_pme_capable(pdev, PCI_D3hot) && !(info->no_m3)) {
>>> @@ -1396,7 +1404,8 @@ static void mhi_pci_remove(struct pci_dev *pdev)
>>>       struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev);
>>>       struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl;
>>> -    timer_delete_sync(&mhi_pdev->health_check_timer);
>>> +    if (pdev->is_physfn)
>>> +        timer_delete_sync(&mhi_pdev->health_check_timer);
>>>       cancel_work_sync(&mhi_pdev->recovery_work);
>>>       if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
>>> @@ -1424,7 +1433,8 @@ static void mhi_pci_reset_prepare(struct 
>>> pci_dev *pdev)
>>>       dev_info(&pdev->dev, "reset\n");
>>> -    timer_delete(&mhi_pdev->health_check_timer);
>>> +    if (pdev->is_physfn)
>>> +        timer_delete(&mhi_pdev->health_check_timer);
>>>       /* Clean up MHI state */
>>>       if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
>>> @@ -1469,7 +1479,8 @@ static void mhi_pci_reset_done(struct pci_dev 
>>> *pdev)
>>>       }
>>>       set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status);
>>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>> +    if (pdev->is_physfn)
>>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>>   }
>>>   static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev,
>>> @@ -1534,7 +1545,9 @@ static int  __maybe_unused 
>>> mhi_pci_runtime_suspend(struct device *dev)
>>>       if (test_and_set_bit(MHI_PCI_DEV_SUSPENDED, &mhi_pdev->status))
>>>           return 0;
>>> -    timer_delete(&mhi_pdev->health_check_timer);
>>> +    if (pdev->is_physfn)
>>> +        timer_delete(&mhi_pdev->health_check_timer);
>>> +
>>>       cancel_work_sync(&mhi_pdev->recovery_work);
>>>       if (!test_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status) ||
>>> @@ -1585,7 +1598,8 @@ static int __maybe_unused 
>>> mhi_pci_runtime_resume(struct device *dev)
>>>       }
>>>       /* Resume health check */
>>> -    mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>> +    if (pdev->is_physfn)
>>> +        mod_timer(&mhi_pdev->health_check_timer, jiffies + 
>>> HEALTH_CHECK_PERIOD);
>>>       /* It can be a remote wakeup (no mhi runtime_get), update 
>>> access time */
>>>       pm_runtime_mark_last_busy(dev);
>>>
> 

[PATCH v4 3/6] bus: mhi: host: pci_generic: Add SRIOV support

[Vivek.Pernamitta]

From: Vivek Pernamitta <quic_vpernami@quicinc.com>

pci_sriov_configure_simple() will enable or disable SR-IOV for devices
that don't require any specific PF setup before enabling SR-IOV.

Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
 drivers/bus/mhi/host/pci_generic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 6fa16975e320212a50e0b68ddb34db5ce711589c..6d0bade288265d9fdab8555c089c9153b642454f 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -1685,7 +1685,8 @@ static struct pci_driver mhi_pci_driver = {
 	.remove		= mhi_pci_remove,
 	.shutdown	= mhi_pci_shutdown,
 	.err_handler	= &mhi_pci_err_handler,
-	.driver.pm	= &mhi_pci_pm_ops
+	.driver.pm	= &mhi_pci_pm_ops,
+	.sriov_configure = pci_sriov_configure_simple,
 };
 module_pci_driver(mhi_pci_driver);
 

-- 
2.34.1

[PATCH v4 4/6] bus: mhi: host: pci_generic: Remove MHI driver and ensure graceful device recovery

[Vivek.Pernamitta]

From: Vivek Pernamitta <quic_vpernami@quicinc.com>

So, When the MHI driver is removed from the host side, it is essential to
ensure a clean and stable recovery of the device. This commit introduces
the following steps to achieve that:

1. Disable SR-IOV for any SR-IOV-enabled devices on the Physical Function.
2. Perform a SOC_RESET on the PF to fully reset the device.

Disabling SR-IOV ensures all Virtual Functions (VFs) are properly shutdown,
preventing issues during the reset process. The SOC_RESET guarantees that
the PF is restored to a known good state.

If soc_reset is not performed device at driver remove, device will be
stuck in mission mode state and subsequent driver insert/power_up will not
proceed further.

Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
---
 drivers/bus/mhi/host/pci_generic.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 6d0bade288265d9fdab8555c089c9153b642454f..4de7e56d4b8819f1b26a34b8a9649327314169dd 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -45,6 +45,7 @@
  * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead
  *		   of inband wake support (such as sdx24)
  * @no_m3: M3 not supported
+ * @reset_on_remove: Set true for devices that require SoC during driver removal
  */
 struct mhi_pci_dev_info {
 	const struct mhi_controller_config *config;
@@ -58,6 +59,7 @@ struct mhi_pci_dev_info {
 	unsigned int mru_default;
 	bool sideband_wake;
 	bool no_m3;
+	bool reset_on_remove;
 };
 
 #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \
@@ -300,6 +302,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = {
 	.dma_data_width = 32,
 	.sideband_wake = false,
 	.no_m3 = true,
+	.reset_on_remove = true,
 };
 
 static const struct mhi_channel_config mhi_qcom_sa8775p_channels[] = {
@@ -1027,6 +1030,7 @@ struct mhi_pci_device {
 	struct work_struct recovery_work;
 	struct timer_list health_check_timer;
 	unsigned long status;
+	bool reset_on_remove;
 };
 
 static int mhi_pci_read_reg(struct mhi_controller *mhi_cntrl,
@@ -1332,6 +1336,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	mhi_cntrl->mru = info->mru_default;
 	mhi_cntrl->name = info->name;
 
+	if (pdev->is_physfn)
+		mhi_pdev->reset_on_remove = info->reset_on_remove;
+
 	if (info->edl_trigger)
 		mhi_cntrl->edl_trigger = mhi_pci_generic_edl_trigger;
 
@@ -1404,6 +1411,8 @@ static void mhi_pci_remove(struct pci_dev *pdev)
 	struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev);
 	struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl;
 
+	pci_disable_sriov(pdev);
+
 	if (pdev->is_physfn)
 		timer_delete_sync(&mhi_pdev->health_check_timer);
 	cancel_work_sync(&mhi_pdev->recovery_work);
@@ -1417,6 +1426,9 @@ static void mhi_pci_remove(struct pci_dev *pdev)
 	if (pci_pme_capable(pdev, PCI_D3hot))
 		pm_runtime_get_noresume(&pdev->dev);
 
+	if (mhi_pdev->reset_on_remove)
+		mhi_soc_reset(mhi_cntrl);
+
 	mhi_unregister_controller(mhi_cntrl);
 }
 

-- 
2.34.1

[PATCH v4 5/6] bus: mhi: core: Improve mhi_sync_power_up handling for SYS_ERR state

[Vivek.Pernamitta]

From: Vivek Pernamitta <quic_vpernami@quicinc.com>

Ensure mhi_sync_power_up waits for Mission Mode after SYS_ERR

Allow mhi_sync_power_up to handle SYS_ERR during power-up, reboot,
or recovery. Avoid premature exit when MHI_PM_IN_ERROR_STATE is seen.

Treat SYS_ERR as a valid state and let its handler process the error.
Queue the next transition to Mission Mode instead of aborting early.
Prevent teardown before SYS_ERR is serviced to enable proper recovery.
Improve robustness by ensuring Mission Mode is reached after SYS_ERR.

Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
---
 drivers/bus/mhi/host/internal.h | 2 ++
 drivers/bus/mhi/host/pm.c       | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h
index 034be33565b78eff9bdefd93faa4f3ce93825bad..9f815cfac763e1a33f55804cfd7f3df9cf53f89a 100644
--- a/drivers/bus/mhi/host/internal.h
+++ b/drivers/bus/mhi/host/internal.h
@@ -170,6 +170,8 @@ enum mhi_pm_state {
 							MHI_PM_IN_ERROR_STATE(pm_state))
 #define MHI_PM_IN_SUSPEND_STATE(pm_state)		(pm_state & \
 							(MHI_PM_M3_ENTER | MHI_PM_M3))
+#define MHI_PM_FATAL_ERROR(pm_state)			((pm_state == MHI_PM_FW_DL_ERR) || \
+							(pm_state >= MHI_PM_SYS_ERR_FAIL))
 
 #define NR_OF_CMD_RINGS					1
 #define CMD_EL_PER_RING					128
diff --git a/drivers/bus/mhi/host/pm.c b/drivers/bus/mhi/host/pm.c
index 33d92bf2fc3ed48db5f7fe80e4f0ef9fe2d2f2ab..31b20c07de9ee7006dbb81e3ab2fbf6e66396d98 100644
--- a/drivers/bus/mhi/host/pm.c
+++ b/drivers/bus/mhi/host/pm.c
@@ -1279,7 +1279,7 @@ int mhi_sync_power_up(struct mhi_controller *mhi_cntrl)
 		mhi_cntrl->ready_timeout_ms : mhi_cntrl->timeout_ms;
 	wait_event_timeout(mhi_cntrl->state_event,
 			   MHI_IN_MISSION_MODE(mhi_cntrl->ee) ||
-			   MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state),
+			   MHI_PM_FATAL_ERROR(mhi_cntrl->pm_state),
 			   msecs_to_jiffies(timeout_ms));
 
 	ret = (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -ETIMEDOUT;

-- 
2.34.1

[PATCH v4 6/6] bus: mhi: host: pci_generic: Support independent DMA mask for VFs

[Vivek.Pernamitta]

From: Vivek Pernamitta <quic_vpernami@quicinc.com>

Certain devices like QDU100 bootloader support only up to a 32-bit DMA
address range. However, Virtual Functions (VFs) are enabled only after
the device enters Mission Mode and can support higher DMA address ranges
(up to 40 bits).

A 32-bit DMA mask limits addressable space to 4GiB, which is insufficient
for data transfer requirements over VFs on platforms like QDU100. These
devices require larger memory regions to be mapped for efficient VF
operation.

To address this, configure `dma_mask` independently for Physical Functions
(PFs) and Virtual Functions (VFs), allowing VFs to use higher DMA mask
values where supported.

As per PCIe SR-IOV specification (rev 0.9, Section 1), VFs are capable of
handling resources associated with the main data movement of the Function.

This change ensures compatibility with bootloaders that have limited DMA
capabilities while enabling full VF functionality once the device reaches
Mission Mode.

Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
---
 drivers/bus/mhi/host/pci_generic.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 4de7e56d4b8819f1b26a34b8a9649327314169dd..b188bbf7de042d8b9aa0dde1217d2c86558c3caf 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c
@@ -41,6 +41,7 @@
  * @edl_trigger: capable of triggering EDL mode in the device (if supported)
  * @bar_num: PCI base address register to use for MHI MMIO register space
  * @dma_data_width: DMA transfer word size (32 or 64 bits)
+ * @vf_dma_data_width: DMA transfer word size for VF's (optional)
  * @mru_default: default MRU size for MBIM network packets
  * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead
  *		   of inband wake support (such as sdx24)
@@ -56,6 +57,7 @@ struct mhi_pci_dev_info {
 	bool edl_trigger;
 	unsigned int bar_num;
 	unsigned int dma_data_width;
+	unsigned int vf_dma_data_width;
 	unsigned int mru_default;
 	bool sideband_wake;
 	bool no_m3;
@@ -300,6 +302,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = {
 	.config = &mhi_qcom_qdu100_config,
 	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
 	.dma_data_width = 32,
+	.vf_dma_data_width = 40,
 	.sideband_wake = false,
 	.no_m3 = true,
 	.reset_on_remove = true,
@@ -1300,6 +1303,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	const struct mhi_controller_config *mhi_cntrl_config;
 	struct mhi_pci_device *mhi_pdev;
 	struct mhi_controller *mhi_cntrl;
+	unsigned int dma_data_width;
 	int err;
 
 	dev_info(&pdev->dev, "MHI PCI device found: %s\n", info->name);
@@ -1322,9 +1326,12 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
 	mhi_cntrl = &mhi_pdev->mhi_cntrl;
 
+	dma_data_width = (pdev->is_virtfn && info->vf_dma_data_width) ?
+			  info->vf_dma_data_width : info->dma_data_width;
+
 	mhi_cntrl->cntrl_dev = &pdev->dev;
 	mhi_cntrl->iova_start = 0;
-	mhi_cntrl->iova_stop = (dma_addr_t)DMA_BIT_MASK(info->dma_data_width);
+	mhi_cntrl->iova_stop = (dma_addr_t)DMA_BIT_MASK(dma_data_width);
 	mhi_cntrl->fw_image = info->fw;
 	mhi_cntrl->edl_image = info->edl;
 
@@ -1348,7 +1355,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 		mhi_cntrl->wake_toggle = mhi_pci_wake_toggle_nop;
 	}
 
-	err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width));
+	err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(dma_data_width));
 	if (err)
 		return err;
 

-- 
2.34.1

Re: [PATCH v4 0/6] bus: mhi: host: Enable SRIOV support in MHI driver

[Manivannan Sadhasivam]

On Fri, 12 Sep 2025 18:18:04 +0530, Vivek.Pernamitta@quicinc.com wrote:
> This patch introduces several enhancements for the SRIOV support in MHI driver
> focusing on enabling SRIOV and improving the MHI driver removal process.
> 
> - Add support to enable SRIOV.
> 
> - Remove health check monitor for VF's and read PF's device id for VF.
> 
> [...]

Applied, thanks!

[1/6] bus: mhi: host: Add support for separate controller configurations for VF and PF
      commit: a9e3d5a69cf8d1a73733c52f593a3f803f576391
[2/6] bus: mhi: host: pci_generic: Read SUBSYSTEM_VENDOR_ID for VF's to check status
      commit: b4d01c5b9a9d2dc39f52be22809e845cc4c46f03
[3/6] bus: mhi: host: pci_generic: Add SRIOV support
      commit: fd6e0509d0e86059f9a1c25b0b91ef5d0021701f
[4/6] bus: mhi: host: pci_generic: Remove MHI driver and ensure graceful device recovery
      commit: 12543f4405887da9f3e401e708ca0ff796a7b866
[5/6] bus: mhi: core: Improve mhi_sync_power_up handling for SYS_ERR state
      commit: aa1a0e93ed21a06acb7ca9d4a4a9fce75ea53d0c
[6/6] bus: mhi: host: pci_generic: Support independent DMA mask for VFs
      commit: 54c67740fff7360b6607d02b8499d09b944b3fda

Best regards,
-- 
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>