* [PATCH] ARM: dts: stm32: Enable stm32mp1 clock driver on stm32mp157c
@ 2018-03-15 7:18 gabriel.fernandez
2018-03-17 6:13 ` kbuild test robot
2018-04-16 11:59 ` Alexandre Torgue
0 siblings, 2 replies; 3+ messages in thread
From: gabriel.fernandez @ 2018-03-15 7:18 UTC (permalink / raw)
To: Maxime Coquelin, Alexandre Torgue, Rob Herring, Mark Rutland,
Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel, gabriel.fernandez
From: Gabriel Fernandez <gabriel.fernandez@st.com>
This patch enables stm32mp1 clock driver.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
---
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 24 ++++++++--------
arch/arm/boot/dts/stm32mp157c.dtsi | 48 +++++++++++--------------------
2 files changed, 28 insertions(+), 44 deletions(-)
diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index c0743305..6f044100 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -20,7 +20,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOA>;
st,bank-name = "GPIOA";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 0 16>;
@@ -32,7 +32,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x1000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOB>;
st,bank-name = "GPIOB";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 16 16>;
@@ -44,7 +44,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x2000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOC>;
st,bank-name = "GPIOC";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 32 16>;
@@ -56,7 +56,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x3000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOD>;
st,bank-name = "GPIOD";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 48 16>;
@@ -68,7 +68,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x4000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOE>;
st,bank-name = "GPIOE";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 64 16>;
@@ -80,7 +80,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x5000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOF>;
st,bank-name = "GPIOF";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 80 16>;
@@ -92,7 +92,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x6000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOG>;
st,bank-name = "GPIOG";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 96 16>;
@@ -104,7 +104,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x7000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOH>;
st,bank-name = "GPIOH";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 112 16>;
@@ -116,7 +116,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x8000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOI>;
st,bank-name = "GPIOI";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 128 16>;
@@ -128,7 +128,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x9000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOJ>;
st,bank-name = "GPIOJ";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 144 16>;
@@ -140,7 +140,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xa000 0x400>;
- clocks = <&clk_pll3_p>;
+ clocks = <&rcc GPIOK>;
st,bank-name = "GPIOK";
ngpios = <8>;
gpio-ranges = <&pinctrl 0 160 8>;
@@ -174,7 +174,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 0x400>;
- clocks = <&clk_pll2_p>;
+ clocks = <&rcc GPIOZ>;
st,bank-name = "GPIOZ";
st,bank-ioport = <11>;
ngpios = <8>;
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 9e17e42..bc3eddc 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -4,6 +4,7 @@
* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/stm32mp1-clks.h>
/ {
#address-cells = <1>;
@@ -71,12 +72,6 @@
clock-frequency = <24000000>;
};
- clk_pll_per: clk-pll-per {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <64000000>;
- };
-
clk_hsi: clk-hsi {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -100,24 +95,6 @@
compatible = "fixed-clock";
clock-frequency = <4000000>;
};
-
- clk_pclk1: clk-pclk1 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <86000000>;
- };
-
- clk_pll3_p: clk-pll3_p {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <172000000>;
- };
-
- clk_pll2_p: clk-pll2_p {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <264000000>;
- };
};
soc {
@@ -131,7 +108,7 @@
compatible = "st,stm32h7-uart";
reg = <0x4000e000 0x400>;
interrupts = <GIC_SPI 38 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc USART2_K>;
status = "disabled";
};
@@ -139,7 +116,7 @@
compatible = "st,stm32h7-uart";
reg = <0x4000f000 0x400>;
interrupts = <GIC_SPI 39 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc USART3_K>;
status = "disabled";
};
@@ -147,7 +124,7 @@
compatible = "st,stm32h7-uart";
reg = <0x40010000 0x400>;
interrupts = <GIC_SPI 52 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc UART4_K>;
status = "disabled";
};
@@ -155,7 +132,7 @@
compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
interrupts = <GIC_SPI 53 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc UART5_K>;
status = "disabled";
};
@@ -163,7 +140,7 @@
compatible = "st,stm32h7-uart";
reg = <0x40018000 0x400>;
interrupts = <GIC_SPI 82 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc UART7_K>;
status = "disabled";
};
@@ -171,7 +148,7 @@
compatible = "st,stm32h7-uart";
reg = <0x40019000 0x400>;
interrupts = <GIC_SPI 83 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc UART8_K>;
status = "disabled";
};
@@ -179,15 +156,22 @@
compatible = "st,stm32h7-uart";
reg = <0x44003000 0x400>;
interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc USART6_K>;
status = "disabled";
};
+ rcc: rcc@50000000 {
+ compatible = "st,stm32mp1-rcc", "syscon";
+ reg = <0x50000000 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
interrupts = <GIC_SPI 37 IRQ_TYPE_NONE>;
- clocks = <&clk_pclk1>;
+ clocks = <&rcc USART1_K>;
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ARM: dts: stm32: Enable stm32mp1 clock driver on stm32mp157c
2018-03-15 7:18 [PATCH] ARM: dts: stm32: Enable stm32mp1 clock driver on stm32mp157c gabriel.fernandez
@ 2018-03-17 6:13 ` kbuild test robot
2018-04-16 11:59 ` Alexandre Torgue
1 sibling, 0 replies; 3+ messages in thread
From: kbuild test robot @ 2018-03-17 6:13 UTC (permalink / raw)
To: gabriel.fernandez
Cc: kbuild-all, Maxime Coquelin, Alexandre Torgue, Rob Herring,
Mark Rutland, Russell King, linux-arm-kernel, devicetree,
linux-kernel, gabriel.fernandez
[-- Attachment #1: Type: text/plain, Size: 1372 bytes --]
Hi Gabriel,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on next-20180309]
[cannot apply to v4.16-rc4 v4.16-rc3 v4.16-rc2 v4.16-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/gabriel-fernandez-st-com/ARM-dts-stm32-Enable-stm32mp1-clock-driver-on-stm32mp157c/20180317-102206
config: arm-at91_dt_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
All errors (new ones prefixed by >>):
In file included from arch/arm/boot/dts/stm32mp157c-ed1.dts:8:0:
>> arch/arm/boot/dts/stm32mp157c.dtsi:7:10: fatal error: dt-bindings/clock/stm32mp1-clks.h: No such file or directory
#include <dt-bindings/clock/stm32mp1-clks.h>
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
vim +7 arch/arm/boot/dts/stm32mp157c.dtsi
> 7 #include <dt-bindings/clock/stm32mp1-clks.h>
8
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 23072 bytes --]
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ARM: dts: stm32: Enable stm32mp1 clock driver on stm32mp157c
2018-03-15 7:18 [PATCH] ARM: dts: stm32: Enable stm32mp1 clock driver on stm32mp157c gabriel.fernandez
2018-03-17 6:13 ` kbuild test robot
@ 2018-04-16 11:59 ` Alexandre Torgue
1 sibling, 0 replies; 3+ messages in thread
From: Alexandre Torgue @ 2018-04-16 11:59 UTC (permalink / raw)
To: gabriel.fernandez, Maxime Coquelin, Rob Herring, Mark Rutland,
Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel
Hi Gabriel,
On 03/15/2018 08:18 AM, gabriel.fernandez@st.com wrote:
> From: Gabriel Fernandez <gabriel.fernandez@st.com>
>
> This patch enables stm32mp1 clock driver.
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Applied on stm32-next.
Thanks.
Alex
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-04-16 12:00 UTC | newest]
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2018-03-15 7:18 [PATCH] ARM: dts: stm32: Enable stm32mp1 clock driver on stm32mp157c gabriel.fernandez
2018-03-17 6:13 ` kbuild test robot
2018-04-16 11:59 ` Alexandre Torgue
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