* [PATCH v3] arm64: dts: rockchip: enable SD UHS-I on Firefly-RK3399
@ 2026-11-06 6:18 Yaozhong Li
2026-11-06 8:09 ` Heiko Stübner
0 siblings, 1 reply; 2+ messages in thread
From: Yaozhong Li @ 2026-11-06 6:18 UTC (permalink / raw)
To: Heiko Stuebner
Cc: Rob Herring, Shawn Lin, Jonas Karlman, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, Yaozhong Li
Contrary to its name, vcc_sdio is the IO supply of the SD card slot: the
schematics route it to SDMMC0_VDD. It is listed as the vmmc-supply
of the WiFi SDIO node instead, and that consumer keeps the rail from
switching to 1.8V.
The WiFi module's main VBAT input comes from vcc3v3_sys, and its IO
supply stays vcc1v8_s3. The card slot itself is fed from vcc3v3_sys
through a switch enabled by GPIO4_D6, which the vendor device tree calls
vcc_sd.
Fix the supplies of sdio0 and sdmmc accordingly, describe vcc_sd, and
enable SDR104, which now becomes possible.
With UHS enabled, sequential read from a 64GB SDXC card goes from
22 MB/s to 60 MB/s. WiFi remained associated at 5 GHz, with no WiFi
errors.
Assisted-by: LLM
Signed-off-by: Yaozhong Li <yaozhonguwl@gmail.com>
---
Changes in v3:
- Describe the slot's own supply, vcc_sd, and use it as the sdmmc
vmmc-supply (Heiko). It is fed from vcc3v3_sys, and GPIO4_D6 controls
the slot power switch: holding the pin low leaves the card unpowered.
This is the same arrangement as vcc3v0_sd on the ROC-PC. The existing,
unreferenced lcd_panel_reset pinctrl entry also names GPIO4_D6; the
vendor tree uses the pin only for vcc_sd.
- Link to v2: https://lore.kernel.org/all/20261105102556.1365-1-yaozhonguwl@gmail.com/
Changes in v2:
- Point the sdio0 vmmc-supply at vcc3v3_sys, the WiFi module's VBAT input,
instead of dropping it (Heiko)
- Rewrite the commit message (Heiko)
- Link to v1: https://lore.kernel.org/all/20260922055011.14972-1-yaozhonguwl@gmail.com/
On the boot-time issue described in v2: with the vmmc-supply in place
the sdmmc controller now probes after the GRF io-domain here, and a card
present at boot came up in SDR104 in 5 of 5 warm boots, against 0 of 8
before. That is a change in probe order rather than a fix for the
ordering problem itself.
.../boot/dts/rockchip/rk3399-firefly.dts | 24 ++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 0568dfa..03858a4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -233,6 +233,19 @@ vcc5v0_typec: regulator-vcc5v0-typec {
vin-supply = <&vcc_sys>;
};
+ vcc_sd: regulator-vcc-sd {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc_sd_en>;
+ regulator-name = "vcc_sd";
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
vcc_sys: regulator-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -731,6 +744,12 @@ wifi_enable_h: wifi-enable-h {
};
};
+ sdmmc {
+ vcc_sd_en: vcc-sd-en {
+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
usb-typec {
vcc5v0_typec_en: vcc5v0_typec_en {
rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -777,7 +796,7 @@ &sdio0 {
/* Power supply */
vqmmc-supply = <&vcc1v8_s3>; /* IO line */
- vmmc-supply = <&vcc_sdio>; /* card's power */
+ vmmc-supply = <&vcc3v3_sys>; /* card's power */
#address-cells = <1>;
#size-cells = <0>;
@@ -804,6 +823,9 @@ &sdmmc {
max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_sdio>;
status = "okay";
};
base-commit: 940de590b839f71d6dc846160534bf202401b8b7
--
2.55.0.windows.3
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [PATCH v3] arm64: dts: rockchip: enable SD UHS-I on Firefly-RK3399
2026-11-06 6:18 [PATCH v3] arm64: dts: rockchip: enable SD UHS-I on Firefly-RK3399 Yaozhong Li
@ 2026-11-06 8:09 ` Heiko Stübner
0 siblings, 0 replies; 2+ messages in thread
From: Heiko Stübner @ 2026-11-06 8:09 UTC (permalink / raw)
To: Yaozhong Li
Cc: Rob Herring, Shawn Lin, Jonas Karlman, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, Yaozhong Li
Hi,
Am Freitag, 6. November 2026, 07:18:35 Mitteleuropäische Normalzeit schrieb Yaozhong Li:
[...]
> - Describe the slot's own supply, vcc_sd, and use it as the sdmmc
> vmmc-supply (Heiko). It is fed from vcc3v3_sys, and GPIO4_D6 controls
> the slot power switch: holding the pin low leaves the card unpowered.
> This is the same arrangement as vcc3v0_sd on the ROC-PC. The existing,
> unreferenced lcd_panel_reset pinctrl entry also names GPIO4_D6; the
> vendor tree uses the pin only for vcc_sd.
I you're reading the schematics, this is wrong.
In the schematics file Shawn linked to earlier (and also the one I have),
GPIO4_D6 is connected to the reset-pin of an AT18.
While the vcc3v0_sd is an always on regulator coming from vcc3v3_sys.
As stated in v2, see page 20 of your schematics.
So you essentially just set vmmc-supply to vcc3v3_sys. As I said that is
merely descriptive.
Heiko
> - Link to v2: https://lore.kernel.org/all/20261105102556.1365-1-yaozhonguwl@gmail.com/
>
> Changes in v2:
> - Point the sdio0 vmmc-supply at vcc3v3_sys, the WiFi module's VBAT input,
> instead of dropping it (Heiko)
> - Rewrite the commit message (Heiko)
> - Link to v1: https://lore.kernel.org/all/20260922055011.14972-1-yaozhonguwl@gmail.com/
>
> On the boot-time issue described in v2: with the vmmc-supply in place
> the sdmmc controller now probes after the GRF io-domain here, and a card
> present at boot came up in SDR104 in 5 of 5 warm boots, against 0 of 8
> before. That is a change in probe order rather than a fix for the
> ordering problem itself.
>
> .../boot/dts/rockchip/rk3399-firefly.dts | 24 ++++++++++++++++++-
> 1 file changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
> index 0568dfa..03858a4 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
> @@ -233,6 +233,19 @@ vcc5v0_typec: regulator-vcc5v0-typec {
> vin-supply = <&vcc_sys>;
> };
>
> + vcc_sd: regulator-vcc-sd {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc_sd_en>;
> + regulator-name = "vcc_sd";
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc3v3_sys>;
> + };
> +
> vcc_sys: regulator-vcc-sys {
> compatible = "regulator-fixed";
> regulator-name = "vcc_sys";
> @@ -731,6 +744,12 @@ wifi_enable_h: wifi-enable-h {
> };
> };
>
> + sdmmc {
> + vcc_sd_en: vcc-sd-en {
> + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> usb-typec {
> vcc5v0_typec_en: vcc5v0_typec_en {
> rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
> @@ -777,7 +796,7 @@ &sdio0 {
>
> /* Power supply */
> vqmmc-supply = <&vcc1v8_s3>; /* IO line */
> - vmmc-supply = <&vcc_sdio>; /* card's power */
> + vmmc-supply = <&vcc3v3_sys>; /* card's power */
>
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -804,6 +823,9 @@ &sdmmc {
> max-frequency = <150000000>;
> pinctrl-names = "default";
> pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_sd>;
> + vqmmc-supply = <&vcc_sdio>;
> status = "okay";
> };
>
>
> base-commit: 940de590b839f71d6dc846160534bf202401b8b7
>
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2026-11-06 6:18 [PATCH v3] arm64: dts: rockchip: enable SD UHS-I on Firefly-RK3399 Yaozhong Li
2026-11-06 8:09 ` Heiko Stübner
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