From: Andrew Lunn <andrew@lunn.ch>
To: Tristram.Ha@microchip.com
Cc: Woojung Huh <woojung.huh@microchip.com>,
Vladimir Oltean <olteanv@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
UNGLinuxDriver@microchip.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC net-next 1/2] net: pcs: xpcs: Add special code to operate in Microchip KSZ9477 switch
Date: Tue, 28 Jan 2025 14:16:28 +0100 [thread overview]
Message-ID: <69e2c86e-b463-4c4a-8f2c-0613b29be916@lunn.ch> (raw)
In-Reply-To: <20250128033226.70866-2-Tristram.Ha@microchip.com>
> For 1000BaseX mode setting neg_mode to false works, but that does not
> work for SGMII mode. Setting 0x18 value in register 0x1f8001 allows
> 1000BaseX mode to work with auto-negotiation enabled.
Unless you have the datasheet, writing 0x18 to 0x1f8001 is pretty
meaningless. You need to explain what these two bits mean in this
register.
Andrew
next prev parent reply other threads:[~2025-01-28 13:16 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-28 3:32 [PATCH RFC net-next 0/2] Add SGMII port support to " Tristram.Ha
2025-01-28 3:32 ` [PATCH RFC net-next 1/2] net: pcs: xpcs: Add special code to operate in Microchip " Tristram.Ha
2025-01-28 9:24 ` Russell King (Oracle)
2025-01-28 10:21 ` Vladimir Oltean
2025-01-28 12:33 ` Russell King (Oracle)
2025-01-28 15:23 ` Vladimir Oltean
2025-01-28 16:32 ` Russell King (Oracle)
2025-01-28 18:26 ` Vladimir Oltean
2025-01-29 0:31 ` Tristram.Ha
2025-01-29 21:12 ` Vladimir Oltean
2025-01-29 22:05 ` Russell King (Oracle)
2025-01-29 23:05 ` Vladimir Oltean
2025-01-30 12:44 ` Russell King (Oracle)
2025-01-30 17:42 ` Russell King (Oracle)
2025-01-30 4:50 ` [WARNING: ATTACHMENT UNSCANNED]Re: " Tristram.Ha
2025-01-30 10:02 ` Vladimir Oltean
2025-01-30 11:02 ` Russell King (Oracle)
2025-01-30 11:20 ` Jose Abreu
2025-01-31 14:36 ` Jose Abreu
2025-01-31 15:49 ` Russell King (Oracle)
2025-02-01 1:12 ` [WARNING: ATTACHMENT UNSCANNED]Re: " Tristram.Ha
2025-02-01 9:20 ` Russell King (Oracle)
2025-01-31 2:35 ` Tristram.Ha
2025-01-30 10:15 ` Russell King (Oracle)
2025-01-31 2:35 ` Tristram.Ha
2025-01-31 13:35 ` Andrew Lunn
2025-02-01 1:11 ` Tristram.Ha
2025-01-30 4:50 ` Tristram.Ha
2025-01-30 9:59 ` Russell King (Oracle)
2025-01-31 2:24 ` Tristram.Ha
2025-01-31 9:43 ` Russell King (Oracle)
2025-01-30 13:24 ` Andrew Lunn
2025-01-31 2:21 ` Tristram.Ha
2025-01-28 12:40 ` Russell King (Oracle)
2025-01-28 13:16 ` Andrew Lunn [this message]
2025-01-28 13:39 ` Russell King (Oracle)
2025-01-28 15:43 ` Vladimir Oltean
2025-01-29 0:31 ` Tristram.Ha
2025-01-28 3:32 ` [PATCH RFC net-next 2/2] net: dsa: microchip: Add SGMII port support to " Tristram.Ha
2025-01-28 9:38 ` Russell King (Oracle)
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