Re: [PATCH] irqchip/gicv3: remove disabling redistributor and group1 non-secure interrupts

[Christopher Covington <cov@codeaurora.org>]

Thanks Sudeep!

On 08/16/2016 06:19 AM, Sudeep Holla wrote:
> As per the GICv3 specification, to power down a processor using GICv3
> and allow automatic power-on if an interrupt must be sent to a processor,
> software must set Enable to zero for all interrupt groups(by writing
> to GICC_CTLR or ICC_IGRPEN{0,1}_EL1/3 as appropriate.
> 
> When commit 3708d52fc6bb ("irqchip: gic-v3: Implement CPU PM notifier")
> was introduced there were no firmware implementations(in particular PSCI)
> handling this.
> 
> Linux kernel may not be aware of the CPU power state details and might
> fail to identify the power states that require quiescing the CPU
> interface. Even if it can be aware of those details, it can't determine
> which CPU power state have been triggered at the platform level and how
> the power control is implemented.
> 
> This patch make disabling redistributor and group1 non-secure interrupts
> in the power down path and re-enabling of redistributor in the power-up
> path conditional. It will be handled in the kernel if and only if the
> non-secure accesses are permitted to access and modify control registers.
> It is left to the platform implementation otherwise.
> 
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> ---
>  drivers/irqchip/irq-gic-v3.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> Hi Christopher,
> 
> Can you check if ACPI processor idle works with this patch on QDF2432 ?

This fixes the boot hang, and I see the usage and time files in cpuidle
sysfs increasing on an idle system.

Tested-by: Christopher Covington <cov@codeaurora.org>

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